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authorFancy Fang <B47543@freescale.com>2014-01-08 10:32:52 +0800
committerFancy Fang <chen.fang@freescale.com>2014-01-09 18:15:13 +0800
commit3e1604cbc64550de4aa03a1e68424096d5ea5575 (patch)
tree468956925a396915fa6dce791249e7f3a6c35bb9 /drivers/dma
parent6da29fa3dd16dbc0cbffcbd10b69b865858c820f (diff)
ENGR00294114 PXP: correct the PS U/V buffer settings when format is YVU420P
The PXP itself doesn't support YVU420P default. But we can get the U and V address according to the format when we try to set PS_UBUF and PS_VBUF registers. So the YVU420P can be supported indirectly. Signed-off-by: Fancy Fang <B47543@freescale.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/pxp/pxp_dma_v2.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c
index b5d9170d6e6e..348ef8f80ef4 100644
--- a/drivers/dma/pxp/pxp_dma_v2.c
+++ b/drivers/dma/pxp/pxp_dma_v2.c
@@ -922,8 +922,13 @@ static void pxp_set_s0buf(struct pxps *pxp)
U1 = U + offset;
V = U + ((s0_params->width * s0_params->height) >> s);
V1 = V + offset;
- __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
- __raw_writel(V1, pxp->base + HW_PXP_PS_VBUF);
+ if (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) {
+ __raw_writel(V1, pxp->base + HW_PXP_PS_UBUF);
+ __raw_writel(U1, pxp->base + HW_PXP_PS_VBUF);
+ } else {
+ __raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+ __raw_writel(V1, pxp->base + HW_PXP_PS_VBUF);
+ }
} else if ((s0_params->pixel_fmt == PXP_PIX_FMT_NV12) ||
(s0_params->pixel_fmt == PXP_PIX_FMT_NV21) ||
(s0_params->pixel_fmt == PXP_PIX_FMT_NV16) ||