diff options
| author | Borislav Petkov <borislav.petkov@amd.com> | 2011-01-13 18:02:22 +0100 |
|---|---|---|
| committer | Borislav Petkov <borislav.petkov@amd.com> | 2011-03-17 14:46:21 +0100 |
| commit | 614ec9d8532cc6b2f6b471c399daffdfd1c32d03 (patch) | |
| tree | 3b1df3a950e605047d1fea9a6f3a7598c626cf96 /drivers/edac/amd64_edac.h | |
| parent | 5d4b58e84a382309dfa4dbe19220cd1f78ffc71f (diff) | |
amd64_edac: Revamp online spare handling
Replace per-DCT macros with smarter ones, drop hack and look for the
spare rank on all chip selects on a channel.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.h')
| -rw-r--r-- | drivers/edac/amd64_edac.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 85e3acbc087a..3c60b2f2aeb6 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -259,10 +259,8 @@ #define SCRCTRL 0x58 #define F10_ONLINE_SPARE 0xB0 -#define F10_ONLINE_SPARE_SWAPDONE0(x) ((x) & BIT(1)) -#define F10_ONLINE_SPARE_SWAPDONE1(x) ((x) & BIT(3)) -#define F10_ONLINE_SPARE_BADDRAM_CS0(x) (((x) >> 4) & 0x00000007) -#define F10_ONLINE_SPARE_BADDRAM_CS1(x) (((x) >> 8) & 0x00000007) +#define online_spare_swap_done(pvt, c) (((pvt)->online_spare >> (1 + 2 * (c))) & 0x1) +#define online_spare_bad_dramcs(pvt, c) (((pvt)->online_spare >> (4 + 4 * (c))) & 0x7) #define F10_NB_ARRAY_ADDR 0xB8 #define F10_NB_ARRAY_DRAM_ECC BIT(31) |