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authorDennis Li <Dennis.Li@amd.com>2019-07-19 14:50:25 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-07-31 14:50:54 -0500
commit4bb6b8c758fe3a9225e3003a3fb35d16cac1baeb (patch)
tree70ee2e28bd7b8b9a2ec6a3e94d867535f3f0d915 /drivers/gpu/drm/amd/include
parentca3f422f539551c8a20dc07aa1db87847de478d8 (diff)
drm/amd/include: add define of TCP_EDC_CNT_NEW
Signed-off-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
index f1d048e0ed2c..ca16d9125fbc 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
@@ -1700,6 +1700,8 @@
#define mmTCP_BUFFER_ADDR_HASH_CNTL_BASE_IDX 0
#define mmTCP_EDC_CNT 0x0b17
#define mmTCP_EDC_CNT_BASE_IDX 0
+#define mmTCP_EDC_CNT_NEW 0x0b18
+#define mmTCP_EDC_CNT_NEW_BASE_IDX 0
#define mmTC_CFG_L1_LOAD_POLICY0 0x0b1a
#define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX 0
#define mmTC_CFG_L1_LOAD_POLICY1 0x0b1b