summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_params.c
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2015-11-05 23:04:11 +0200
committerJani Nikula <jani.nikula@intel.com>2015-11-06 14:46:05 +0200
commit1b0e3a049efe471c399674fd954500ce97438d30 (patch)
treed213cb6a9d966aba2cc3f6699739f999428c01b1 /drivers/gpu/drm/i915/i915_params.c
parentb291681926a142958112eedde62823230d6afb84 (diff)
drm/i915/skl: disable display side power well support for now
The display power well support on this platform is in a somewhat broken state atm, so disable it by default. This in effect will get rid of incorrect assert WARNs about the CSR/DMC firmware not being loaded during power well toggling. It also removes a problem during driver loading where a register is accessed while its backing power well is down, resulting in another WARN. Until we come up with the root cause of the second problem and the proper fix for both issues, keep all display side power wells on. Also clarify a bit the option description. Reported-by: Dave Airlie <airlied@redhat.com> Reference: http://mid.gmane.org/CAPM=9tyjBQjSBTKa49cRr6SYkpNW7Pq-fUFznZZ8Y1snvvk7mA@mail.gmail.com Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446757451-2777-1-git-send-email-imre.deak@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_params.c')
-rw-r--r--drivers/gpu/drm/i915/i915_params.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index ca9b8f644ffe..96bb23865eac 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -38,7 +38,7 @@ struct i915_params i915 __read_mostly = {
.enable_ppgtt = -1,
.enable_psr = 0,
.preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT),
- .disable_power_well = 1,
+ .disable_power_well = -1,
.enable_ips = 1,
.prefault_disable = 0,
.load_detect_test = 0,
@@ -127,7 +127,8 @@ MODULE_PARM_DESC(preliminary_hw_support,
module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0600);
MODULE_PARM_DESC(disable_power_well,
- "Disable the power well when possible (default: true)");
+ "Disable display power wells when possible "
+ "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600);
MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");