summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_atomic.c
diff options
context:
space:
mode:
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2015-06-15 12:33:56 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-06-22 14:28:37 +0200
commit27c329ed16ddf5540151dfa9d22c584b819e0718 (patch)
tree13aae91cb338366c5f6d6dd130d9880cc7fae933 /drivers/gpu/drm/i915/intel_atomic.c
parentc389c9c4d981e49185b1c89354c85608effefe50 (diff)
drm/i915: Make cdclk part of the atomic state.
The skylake scalers depend on the cdclk freq, but that frequency can change during a modeset. So when a modeset happens calculate the new cdclk in the atomic state. With the transitional helpers gone the cached value can be used in the scaler, and committed after all crtc's are disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90874 Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_atomic.c')
-rw-r--r--drivers/gpu/drm/i915/intel_atomic.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
index 060d98b10f83..0aeced82201e 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -54,6 +54,8 @@ int intel_atomic_check(struct drm_device *dev,
int i;
bool not_nuclear = false;
+ to_intel_atomic_state(state)->cdclk = to_i915(dev)->cdclk_freq;
+
/*
* FIXME: At the moment, we only support "nuclear pageflip" on a
* single CRTC. Cross-crtc updates will be added later.