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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-07-13 16:03:40 +0100
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-07-14 11:17:20 +0100
commit88d2ba2e95c85554e12b5a342bd93dbc2adf7546 (patch)
treefe3423d0361e0eaea97796f716aaeb6b14846237 /drivers/gpu/drm/i915/intel_lrc.c
parentacd2784562ae506137575c31136bef34dc642a2e (diff)
drm/i915: Move common engine setup into intel_engine_cs.c
Common code deserves to be put in a separate file from legacy and execlists implementation for clarity and ease of maintenance. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c138
1 files changed, 2 insertions, 136 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2e13a3a26245..6e88d9af9328 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2083,7 +2083,7 @@ error:
return ret;
}
-static int logical_render_ring_init(struct intel_engine_cs *engine)
+int logical_render_ring_init(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
int ret;
@@ -2126,147 +2126,13 @@ static int logical_render_ring_init(struct intel_engine_cs *engine)
return ret;
}
-static int logical_xcs_ring_init(struct intel_engine_cs *engine)
+int logical_xcs_ring_init(struct intel_engine_cs *engine)
{
logical_ring_setup(engine);
return logical_ring_init(engine);
}
-static const struct engine_info {
- const char *name;
- unsigned exec_id;
- unsigned guc_id;
- u32 mmio_base;
- unsigned irq_shift;
- int (*init_legacy)(struct intel_engine_cs *engine);
- int (*init_execlists)(struct intel_engine_cs *engine);
-} intel_engines[] = {
- [RCS] = {
- .name = "render ring",
- .exec_id = I915_EXEC_RENDER,
- .guc_id = GUC_RENDER_ENGINE,
- .mmio_base = RENDER_RING_BASE,
- .irq_shift = GEN8_RCS_IRQ_SHIFT,
- .init_execlists = logical_render_ring_init,
- .init_legacy = intel_init_render_ring_buffer,
- },
- [BCS] = {
- .name = "blitter ring",
- .exec_id = I915_EXEC_BLT,
- .guc_id = GUC_BLITTER_ENGINE,
- .mmio_base = BLT_RING_BASE,
- .irq_shift = GEN8_BCS_IRQ_SHIFT,
- .init_execlists = logical_xcs_ring_init,
- .init_legacy = intel_init_blt_ring_buffer,
- },
- [VCS] = {
- .name = "bsd ring",
- .exec_id = I915_EXEC_BSD,
- .guc_id = GUC_VIDEO_ENGINE,
- .mmio_base = GEN6_BSD_RING_BASE,
- .irq_shift = GEN8_VCS1_IRQ_SHIFT,
- .init_execlists = logical_xcs_ring_init,
- .init_legacy = intel_init_bsd_ring_buffer,
- },
- [VCS2] = {
- .name = "bsd2 ring",
- .exec_id = I915_EXEC_BSD,
- .guc_id = GUC_VIDEO_ENGINE2,
- .mmio_base = GEN8_BSD2_RING_BASE,
- .irq_shift = GEN8_VCS2_IRQ_SHIFT,
- .init_execlists = logical_xcs_ring_init,
- .init_legacy = intel_init_bsd2_ring_buffer,
- },
- [VECS] = {
- .name = "video enhancement ring",
- .exec_id = I915_EXEC_VEBOX,
- .guc_id = GUC_VIDEOENHANCE_ENGINE,
- .mmio_base = VEBOX_RING_BASE,
- .irq_shift = GEN8_VECS_IRQ_SHIFT,
- .init_execlists = logical_xcs_ring_init,
- .init_legacy = intel_init_vebox_ring_buffer,
- },
-};
-
-struct intel_engine_cs *
-intel_engine_setup(struct drm_i915_private *dev_priv,
- enum intel_engine_id id)
-{
- const struct engine_info *info = &intel_engines[id];
- struct intel_engine_cs *engine = &dev_priv->engine[id];
-
- engine->id = id;
- engine->i915 = dev_priv;
- engine->name = info->name;
- engine->exec_id = info->exec_id;
- engine->hw_id = engine->guc_id = info->guc_id;
- engine->mmio_base = info->mmio_base;
- engine->irq_shift = info->irq_shift;
-
- return engine;
-}
-
-/**
- * intel_engines_init() - allocate, populate and init the Engine Command Streamers
- * @dev: DRM device.
- *
- * Return: non-zero if the initialization failed.
- */
-int intel_engines_init(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = to_i915(dev);
- unsigned int mask = 0;
- int (*init)(struct intel_engine_cs *engine);
- unsigned int i;
- int ret;
-
- WARN_ON(INTEL_INFO(dev_priv)->ring_mask &
- GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));
-
- for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
- if (!HAS_ENGINE(dev_priv, i))
- continue;
-
- if (i915.enable_execlists)
- init = intel_engines[i].init_execlists;
- else
- init = intel_engines[i].init_legacy;
-
- if (!init)
- continue;
-
- ret = init(intel_engine_setup(dev_priv, i));
- if (ret)
- goto cleanup;
-
- mask |= ENGINE_MASK(i);
- }
-
- /*
- * Catch failures to update intel_engines table when the new engines
- * are added to the driver by a warning and disabling the forgotten
- * engines.
- */
- if (WARN_ON(mask != INTEL_INFO(dev_priv)->ring_mask)) {
- struct intel_device_info *info =
- (struct intel_device_info *)&dev_priv->info;
- info->ring_mask = mask;
- }
-
- return 0;
-
-cleanup:
- for (i = 0; i < I915_NUM_ENGINES; i++) {
- if (i915.enable_execlists)
- intel_logical_ring_cleanup(&dev_priv->engine[i]);
- else
- intel_cleanup_engine(&dev_priv->engine[i]);
- }
-
- return ret;
-}
-
static u32
make_rpcs(struct drm_i915_private *dev_priv)
{