diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-02 11:15:27 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-02 12:10:43 +0100 |
| commit | 2a13ae79524ed8bec32a623e2763c649fa3e0846 (patch) | |
| tree | c34490592315ecda00881c77dcde74bc5b3fe48c /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 238010ed6cc8d3b5c6b146ab813838c6a6992a7b (diff) | |
drm/i915: Protect older gen against intel_gt_init_powersave()
In the middle of intel_gt_init_powersave() we have an if-chain that ends
with a universal else clause to read gen6+ registers. Older platforms
like Pineview that end up here do not like those registers and may even
OOPS whilst reading them!
Fixes: 3ea9a80132 ("drm/i915: Perform static RPS frequency setup ...")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470132927-1821-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e50505c67ef9..b5513d3a2df8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6493,7 +6493,7 @@ void intel_init_gt_powersave(struct drm_i915_private *dev_priv) cherryview_init_gt_powersave(dev_priv); else if (IS_VALLEYVIEW(dev_priv)) valleyview_init_gt_powersave(dev_priv); - else + else if (INTEL_GEN(dev_priv) >= 6) gen6_init_rps_frequencies(dev_priv); /* Derive initial user preferences/limits from the hardware limits */ |