summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_pm.c
diff options
context:
space:
mode:
authorRafael Barbalho <rafael.barbalho@intel.com>2014-04-09 13:28:40 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-20 15:20:27 +0200
commite0d34ce7d0ca54aa45bc436823863a063f70c31a (patch)
treedd5e361ba8fbe4bddff7aeed5ada10d68b4487a6 /drivers/gpu/drm/i915/intel_pm.c
parentb3f797ac492f85f3c8e7a52cd60d70eed117d332 (diff)
drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHV
Cherryview also needs this WA. Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com> [vsyrjala: Looks like it's for pre-prodution hw only] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 605d8e91e67e..1fff413381e9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5401,6 +5401,10 @@ static void cherryview_init_clock_gating(struct drm_device *dev)
/* WaDisableSDEUnitClockGating:chv */
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
+
+ /* WaDisableSamplerPowerBypass:chv (pre-production hw) */
+ I915_WRITE(HALF_SLICE_CHICKEN3,
+ _MASKED_BIT_ENABLE(GEN8_SAMPLER_POWER_BYPASS_DIS));
}
static void g4x_init_clock_gating(struct drm_device *dev)