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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-06-17 17:59:52 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-06-17 17:59:52 +0200
commitd01107902d6fd5eb21a4136a343b531b63e563d6 (patch)
tree197795441706bcc8d6e27ca324951745a21cf67c /drivers/gpu/drm/i915/intel_pm.c
parent3ca407c4f1edfcdf8cdba81bd82b1ab2e9b406a7 (diff)
parent5c7513c4866175f5057fbe1d039e53e00a2dba53 (diff)
Merge remote-tracking branch 'fslc/4.1-2.0.x-imx' into toradex_4.1-2.0.x-imx-next
Conflicts: arch/arm/boot/dts/imx7d.dtsi arch/arm/mach-imx/busfreq-imx.c arch/arm/mach-imx/imx_rpmsg.c drivers/mmc/host/sdhci-esdhc-imx.c Parts moved to: arch/arm/boot/dts/imx7s.dtsi Note: This also includes NXP's latest rel_imx_4.1.15_2.1.0_ga.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 52c703be7882..ac9e7184ff1b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6287,7 +6287,18 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)
{
- I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
+ u32 val;
+
+ /*
+ * On driver load, a pipe may be active and driving a DSI display.
+ * Preserve DPOUNIT_CLOCK_GATE_DISABLE to avoid the pipe getting stuck
+ * (and never recovering) in this case. intel_dsi_post_disable() will
+ * clear it when we turn off the display.
+ */
+ val = I915_READ(DSPCLK_GATE_D);
+ val &= DPOUNIT_CLOCK_GATE_DISABLE;
+ val |= VRHUNIT_CLOCK_GATE_DISABLE;
+ I915_WRITE(DSPCLK_GATE_D, val);
/*
* Disable trickle feed and enable pnd deadline calculation