diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-03-24 13:36:43 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-04-09 10:16:04 +1000 |
| commit | fe251e2fffa1ebc17c8e6e895b0374ae4e732fa5 (patch) | |
| tree | 995060a10005d4a284bebcd0412fabfd0805de89 /drivers/gpu/drm/radeon/evergreend.h | |
| parent | 32fcdbf4084544c3d8fa413004d57e5dc6f2eefe (diff) | |
drm/radeon/kms/evergreen: setup and enable the CP
The command processor (CP) fetches command buffers and
feeds the GPU. This patch requires the evergreen
family me and pfp ucode files.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index effe335356c7..10e9768534da 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h @@ -89,6 +89,7 @@ #define CP_QUEUE_THRESHOLDS 0x8760 #define ROQ_IB1_START(x) ((x) << 0) #define ROQ_IB2_START(x) ((x) << 8) +#define CP_RB_BASE 0xC100 #define CP_RB_CNTL 0xC104 #define RB_BUFSZ(x) ((x) << 0) #define RB_BLKSZ(x) ((x) << 8) @@ -104,6 +105,7 @@ #define CP_RB_WPTR_ADDR_HI 0xC11C #define CP_RB_WPTR_DELAY 0x8704 #define CP_SEM_WAIT_TIMER 0x85BC +#define CP_DEBUG 0xC1FC #define GC_USER_SHADER_PIPE_CONFIG 0x8954 |