diff options
| author | Jerome Glisse <jglisse@redhat.com> | 2010-01-07 12:39:21 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-01-08 13:09:59 +1000 |
| commit | cafe6609d6dc0a6a278f9fdbb59ce4d761a35ddd (patch) | |
| tree | a3e15eabffd6e10bed1ef639fc2f2e087c67b047 /drivers/gpu/drm/radeon/r420.c | |
| parent | 62cdc0c20663ef840a94850892517b2b7f584904 (diff) | |
drm/radeon/kms: Schedule host path read cache flush through the ring V2
R300 family will hard lockup if host path read cache flush is
done through MMIO to HOST_PATH_CNTL. But scheduling same flush
through ring seems harmless. This patch remove the hdp_flush
callback and add a flush after each fence emission which means
a flush after each IB schedule. Thus we should have same behavior
without the hard lockup.
Tested on R100,R200,R300,R400,R500,R600,R700 family.
V2: Adjust fence counts in r600_blit_prepare_copy()
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r420.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/r420.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index f46502a253ec..1d4d16ed7db1 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c @@ -219,6 +219,7 @@ static int r420_startup(struct radeon_device *rdev) r420_pipes_init(rdev); /* Enable IRQ */ r100_irq_set(rdev); + rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); /* 1M ring buffer */ r = r100_cp_init(rdev, 1024 * 1024); if (r) { |