diff options
| author | Michel Dänzer <michel.daenzer@amd.com> | 2012-03-14 17:12:42 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-03-20 08:47:46 +0000 |
| commit | 0349af70da5e590793986a0e03dbf2a435f75103 (patch) | |
| tree | c4104646049fcf3862397cac1b51284bbd48e1b9 /drivers/gpu/drm/radeon/radeon_display.c | |
| parent | c4353016dac10133fa5d8535af83f0c4845a2915 (diff) | |
drm/radeon: Restrict offset for legacy display engine.
The hardware only takes 27 bits for the offset, so larger offsets are
truncated, and the display shows random bits other than the intended ones.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index b25bb2a55814..1ebcef25b915 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -402,7 +402,9 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, DRM_ERROR("failed to reserve new rbo buffer before flip\n"); goto pflip_cleanup; } - r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &base); + /* Only 27 bit offset for legacy CRTC */ + r = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM, + ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, &base); if (unlikely(r != 0)) { radeon_bo_unreserve(rbo); r = -EINVAL; |