diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-16 10:39:17 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-20 18:20:53 -0500 |
| commit | aa34dba8fb9cdcf3f7f8203abce493036b348fdb (patch) | |
| tree | 77129d45b202662fc59bc14cb727cdb361de6b4b /drivers/gpu/drm/radeon/si.c | |
| parent | c4756baa4a8ba75b812506818cbc81178650d3c1 (diff) | |
drm/radeon: write gfx pg bases even when gfx pg is disabled
For consistency. These buffers aren't used when pg is
disabled.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 22d3517ed6ad..07ce58716e44 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -5488,6 +5488,9 @@ static void si_init_pg(struct radeon_device *rdev) si_init_ao_cu_mask(rdev); if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { si_init_gfx_cgpg(rdev); + } else { + WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); + WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); } si_enable_dma_pg(rdev, true); si_enable_gfx_cgpg(rdev, true); |