diff options
| author | Joerg Roedel <joerg.roedel@amd.com> | 2012-06-15 16:53:51 +0200 |
|---|---|---|
| committer | Joerg Roedel <joerg.roedel@amd.com> | 2012-09-28 17:30:03 +0200 |
| commit | 05152a0494449f60031da683e6d4cd60d0882214 (patch) | |
| tree | 610e4df7df61da02c2cc3ccc24aeb38896f7509e /drivers/iommu/amd_iommu_types.h | |
| parent | 6efed63bec36e260204a50cfe6878cd36b710ade (diff) | |
iommu/amd: Add slab-cache for irq remapping tables
The irq remapping tables for the AMD IOMMU need to be
aligned on a 128 byte boundary. Create a seperate slab-cache
to guarantee this alignment.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu/amd_iommu_types.h')
| -rw-r--r-- | drivers/iommu/amd_iommu_types.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index 4495b78b1296..953cea80daa7 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -334,6 +334,15 @@ extern bool amd_iommu_np_cache; /* Only true if all IOMMUs support device IOTLBs */ extern bool amd_iommu_iotlb_sup; +#define MAX_IRQS_PER_TABLE 256 +#define IRQ_TABLE_ALIGNMENT 128 + +/* Interrupt remapping feature used? */ +extern bool amd_iommu_irq_remap; + +/* kmem_cache to get tables with 128 byte alignement */ +extern struct kmem_cache *amd_iommu_irq_cache; + /* * Make iterating over all IOMMUs easier */ |