MLK-23936 mailbox: imx: Add runtime PM callback to handle MU clocks

Some of i.MX8M SoCs have MU clock, they need to be managed in runtime
to make sure the MU domain can be off in runtime, add runtime PM
callback to handle MU clock.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>

1 files changed, 41 insertions, 1 deletions

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index ad3eee74faa2..b2c8ea813d48 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -607,6 +607,8 @@ static int imx_mu_probe(struct platform_device *pdev)
 	if (ret < 0)
 		goto disable_runtime_pm;
 
+	clk_disable_unprepare(priv->clk);
+
 	return 0;
 
 disable_runtime_pm:
@@ -618,7 +620,6 @@ static int imx_mu_remove(struct platform_device *pdev)
 {
 	struct imx_mu_priv *priv = platform_get_drvdata(pdev);
 
-	clk_disable_unprepare(priv->clk);
 	pm_runtime_disable(priv->dev);
 
 	return 0;
@@ -627,8 +628,16 @@ static int imx_mu_remove(struct platform_device *pdev)
 static int imx_mu_suspend_noirq(struct device *dev)
 {
 	struct imx_mu_priv *priv = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		dev_err(dev, "failed to enable clock\n");
+		return ret;
+	}
 
 	priv->xcr = imx_mu_read(priv, priv->dcfg->xCR);
+	clk_disable_unprepare(priv->clk);
 
         return 0;
 }
@@ -636,6 +645,13 @@ static int imx_mu_suspend_noirq(struct device *dev)
 static int imx_mu_resume_noirq(struct device *dev)
 {
 	struct imx_mu_priv *priv = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		dev_err(dev, "failed to enable clock\n");
+		return ret;
+	}
 
 	/*
 	 * ONLY restore MU when context lost, the TIE could
@@ -647,13 +663,37 @@ static int imx_mu_resume_noirq(struct device *dev)
 	 */
 	if (!imx_mu_read(priv, priv->dcfg->xCR))
 		imx_mu_write(priv, priv->xcr, priv->dcfg->xCR);
+	clk_disable_unprepare(priv->clk);
 
 	return 0;
 }
 
+static int imx_mu_runtime_suspend(struct device *dev)
+{
+	struct imx_mu_priv *priv = dev_get_drvdata(dev);
+
+	clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static int imx_mu_runtime_resume(struct device *dev)
+{
+	struct imx_mu_priv *priv = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		dev_err(dev, "failed to enable clock\n");
+
+	return ret;
+}
+
 static const struct dev_pm_ops imx_mu_pm_ops = {
 	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_mu_suspend_noirq,
 				      imx_mu_resume_noirq)
+	SET_RUNTIME_PM_OPS(imx_mu_runtime_suspend,
+			   imx_mu_runtime_resume, NULL)
 };
 
 static const struct imx_mu_dcfg imx_mu_cfg_imx6sx = {