diff options
| author | shivabassu boragalli <sboragalli@nvidia.com> | 2012-02-08 11:37:19 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-02-14 09:46:51 -0800 |
| commit | 39b6c3266150e971e1f876097fbd0dde22e1aaf0 (patch) | |
| tree | 3f75a78899a294a787623c118fe6ecb6396fb986 /drivers/media | |
| parent | 0588c465934ab6f8a43629bce667485d91a4b04b (diff) | |
media: video: tegra: enable VCLK on tegra2
yuv sensor on tegra2 uses VIP clock. This
change enables VCLK pad to get external
clock for VI.
Bug 930769
Bug 936053
Change-Id: I4958d354a59dec0a92ca9b049ff22b7ca4cac0ad
Signed-off-by: Shivabassu Boragalli <sboragalli@nvidia.com>
Reviewed-on: http://git-master/r/83394
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/media')
| -rw-r--r-- | drivers/media/video/tegra/tegra_camera.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/media/video/tegra/tegra_camera.c b/drivers/media/video/tegra/tegra_camera.c index fae9d31eacab..1f4ae729ee97 100644 --- a/drivers/media/video/tegra/tegra_camera.c +++ b/drivers/media/video/tegra/tegra_camera.c @@ -206,6 +206,13 @@ static int tegra_camera_clk_set_rate(struct tegra_camera_dev *dev) */ if (info->flag == TEGRA_CAMERA_ENABLE_PD2VI_CLK) tegra_clk_cfg_ex(clk, TEGRA_CLK_VI_INP_SEL, 2); + +#ifdef CONFIG_ARCH_TEGRA_2x_SOC + u32 val; + void __iomem *apb_misc = IO_ADDRESS(TEGRA_APB_MISC_BASE); + val = readl(apb_misc + 0x42c); + writel(val | 0x1, apb_misc + 0x42c); +#endif } info->rate = clk_get_rate(clk); |