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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-09-10 13:46:22 +0300
committerSamuel Ortiz <sameo@linux.intel.com>2012-09-18 15:44:39 +0200
commit2275c544cb824b469a386e411cbcaa01a19d4f55 (patch)
tree3bc3a273d49bc2b21613721c8e8d91dd54f6db58 /drivers/mfd/twl-core.c
parentcdf4b67099ee8e038178a9e7d83c1aa16618c1ca (diff)
mfd: twl-core: Add API to query the HFCLK rate
CFG_BOOT register's HFCLK_FREQ field hold information about the used HFCLK frequency. Add possibility for users to get the configured rate based on this register. This register was configured during boot, without it the chip would not operate correctly, so we can trust on this information. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/twl-core.c')
-rw-r--r--drivers/mfd/twl-core.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 1c32afed28aa..f162b68e78a8 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -552,6 +552,38 @@ int twl_get_version(void)
}
EXPORT_SYMBOL_GPL(twl_get_version);
+/**
+ * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
+ *
+ * Api to get the TWL HFCLK rate based on BOOT_CFG register.
+ */
+int twl_get_hfclk_rate(void)
+{
+ u8 ctrl;
+ int rate;
+
+ twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
+
+ switch (ctrl & 0x3) {
+ case HFCLK_FREQ_19p2_MHZ:
+ rate = 19200000;
+ break;
+ case HFCLK_FREQ_26_MHZ:
+ rate = 26000000;
+ break;
+ case HFCLK_FREQ_38p4_MHZ:
+ rate = 38400000;
+ break;
+ default:
+ pr_err("TWL4030: HFCLK is not configured\n");
+ rate = -EINVAL;
+ break;
+ }
+
+ return rate;
+}
+EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
+
static struct device *
add_numbered_child(unsigned chip, const char *name, int num,
void *pdata, unsigned pdata_len,