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authorTanmay Upadhyay <tanmay.upadhyay@einfochips.com>2011-09-14 11:29:02 +0530
committerChris Ball <cjb@laptop.org>2011-10-26 16:32:01 -0400
commit329f22371460587c59b866dcbffce5b498b61f38 (patch)
tree3ec4ab2f8a770d58d08404e7336ecd9f84ab8ffa /drivers/mmc/host/sdhci-pxav2.c
parent7f7e4129c23f0419257184dff6fec89d2d5a8964 (diff)
mmc: sdhci-pxa: Check pdata before using its members
Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com> Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pxav2.c')
-rw-r--r--drivers/mmc/host/sdhci-pxav2.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
index 38f58994f79a..1114fe2f0a57 100644
--- a/drivers/mmc/host/sdhci-pxav2.c
+++ b/drivers/mmc/host/sdhci-pxav2.c
@@ -59,7 +59,7 @@ static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
* tune timing of read data/command when crc error happen
* no performance impact
*/
- if (pdata->clk_delay_sel == 1) {
+ if (pdata && pdata->clk_delay_sel == 1) {
tmp = readw(host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
tmp &= ~(SDCLK_DELAY_MASK << SDCLK_DELAY_SHIFT);
@@ -71,7 +71,7 @@ static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
writew(tmp, host->ioaddr + SD_CLOCK_BURST_SIZE_SETUP);
}
- if (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING) {
+ if (pdata && (pdata->flags & PXA_FLAG_ENABLE_CLOCK_GATING)) {
tmp = readw(host->ioaddr + SD_FIFO_PARAM);
tmp &= ~CLK_GATE_SETTING_BITS;
writew(tmp, host->ioaddr + SD_FIFO_PARAM);