diff options
author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2011-12-20 14:19:16 +0530 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2011-12-22 11:30:03 +0530 |
commit | 86b1420e1fb94246a9ded184eb497ec6db11411e (patch) | |
tree | 31b425bec1ffdd314aae8dedf0f5c96e639fbf82 /drivers/mmc/host/sdhci-tegra.c | |
parent | e5b2d410a18995e888cefd916575102cdbd17be6 (diff) |
mmc: tegra: Set tap delay value
Set the tap delay value passed through the
platform data.
Bug 911075
Change-Id: I8f71b65fb6d3683a57054c52c94e3e8ae95f4da3
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/70333
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'drivers/mmc/host/sdhci-tegra.c')
-rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 5822b8eb7d1a..3cdaf24b6db4 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -33,6 +33,7 @@ #define SDHCI_VENDOR_CLOCK_CNTRL_SDMMC_CLK 0x1 #define SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE 0x8 #define SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT 8 +#define SDHCI_VENDOR_CLOCK_CNTRL_TAP_VALUE_SHIFT 16 #define SDHCI_VENDOR_MISC_CNTRL 0x120 #define SDHCI_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SD_3_0 0x20 @@ -145,21 +146,32 @@ static unsigned int tegra_sdhci_get_ro(struct sdhci_host *sdhci) static void tegra3_sdhci_post_reset_init(struct sdhci_host *sdhci) { - u16 ctrl; + u16 misc_ctrl; + u32 vendor_ctrl; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(sdhci); struct tegra_sdhci_host *tegra_host = pltfm_host->priv; + struct platform_device *pdev = to_platform_device(mmc_dev(sdhci->mmc)); + struct tegra_sdhci_platform_data *plat; + plat = pdev->dev.platform_data; /* Set the base clock frequency */ - ctrl = sdhci_readw(sdhci, SDHCI_VENDOR_CLOCK_CNTRL); - ctrl &= ~(0xFF << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); - ctrl |= (tegra3_sdhost_max_clk[tegra_host->instance] / 1000000) << + vendor_ctrl = sdhci_readl(sdhci, SDHCI_VENDOR_CLOCK_CNTRL); + vendor_ctrl &= ~(0xFF << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); + vendor_ctrl |= (tegra3_sdhost_max_clk[tegra_host->instance] / 1000000) << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT; - sdhci_writew(sdhci, ctrl, SDHCI_VENDOR_CLOCK_CNTRL); + /* Set tap delay */ + if (plat->tap_delay) { + vendor_ctrl &= ~(0xFF << + SDHCI_VENDOR_CLOCK_CNTRL_TAP_VALUE_SHIFT); + vendor_ctrl |= (plat->tap_delay << + SDHCI_VENDOR_CLOCK_CNTRL_TAP_VALUE_SHIFT); + } + sdhci_writel(sdhci, vendor_ctrl, SDHCI_VENDOR_CLOCK_CNTRL); /* Enable SDHOST v3.0 support */ - ctrl = sdhci_readw(sdhci, SDHCI_VENDOR_MISC_CNTRL); - ctrl |= SDHCI_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SD_3_0; - sdhci_writew(sdhci, ctrl, SDHCI_VENDOR_MISC_CNTRL); + misc_ctrl = sdhci_readw(sdhci, SDHCI_VENDOR_MISC_CNTRL); + misc_ctrl |= SDHCI_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SD_3_0; + sdhci_writew(sdhci, misc_ctrl, SDHCI_VENDOR_MISC_CNTRL); } static int tegra_sdhci_set_uhs_signaling(struct sdhci_host *host, |