diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2017-04-10 16:16:20 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2017-06-09 22:18:29 +0800 |
| commit | aa365df34d83541cd2c4a85e0b32a94de7a710c7 (patch) | |
| tree | 08a578c834a30cee6ca5a8cee0152ed2c0f0255b /drivers/mmc/host | |
| parent | 5619467aedd00e44279a7d6a6dc3dd2c3d8de981 (diff) | |
MLK-14539 mmc: sdhci: make no-1-8-v also work for DDR52 mode
MMC SDHCI maintainer Adrian Hunter Introduce SDHCI flags for signal
voltage support and set them based on the supported transfer modes,
except in the case where 3V DDR52 is supported but 1.8V is not.
This patch add the support to make eMMC DDR52 only work at 3.3v when
property 'no-1-8-v' defined.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'drivers/mmc/host')
| -rw-r--r-- | drivers/mmc/host/sdhci.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index e81246e03493..51697ba6526d 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3333,6 +3333,7 @@ int sdhci_setup_host(struct sdhci_host *host) if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); + mmc->caps2 |= MMC_CAP2_DDR52_3_3V; } /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ @@ -3472,10 +3473,11 @@ int sdhci_setup_host(struct sdhci_host *host) goto unreg; } - if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | + if (((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR)) || - (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) + (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) && + !(mmc->caps2 & MMC_CAP2_DDR52_3_3V)) host->flags |= SDHCI_SIGNALING_180; if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) |