diff options
| author | Ryan QIAN <b32804@freescale.com> | 2012-02-23 08:23:38 +0800 |
|---|---|---|
| committer | Ryan QIAN <b32804@freescale.com> | 2012-02-23 14:30:02 +0800 |
| commit | 2811e96332f49ea9c82f5ed7e2f58e063c5f04ba (patch) | |
| tree | 4fde10981df9a339a6e8855083c4e78b74ae5771 /drivers/mmc | |
| parent | e011b9c04fd318be68deb040d48498f1c7a74dad (diff) | |
ENGR00175221-01 [MX6] MMCSD: clear EXE_TUNE bit after tuning finishes.
- clear exe_tune flag after tuning in platform code, otherwise it
will reduce io performance for SDR104 cards.
- add platform code to clear exe_tune bit after tuning completes.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a7794df81d37..3f0e1b6a13db 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -253,6 +253,18 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg) return readw(host->ioaddr + reg); } +void esdhc_post_tuning(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct pltfm_imx_data *imx_data = pltfm_host->priv; + u32 reg; + + imx_data->scratchpad &= ~SDHCI_MIX_CTRL_EXE_TUNE; + reg = readl(host->ioaddr + SDHCI_MIX_CTRL); + reg &= ~SDHCI_MIX_CTRL_EXE_TUNE; + writel(reg, host->ioaddr + SDHCI_MIX_CTRL); +} + void esdhc_prepare_tuning(struct sdhci_host *host, u32 val) { u32 reg; @@ -366,6 +378,7 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) writel(imx_data->scratchpad, host->ioaddr + SDHCI_MIX_CTRL); + writel(val << 16, host->ioaddr + SDHCI_TRANSFER_MODE); } else { @@ -554,6 +567,7 @@ static struct sdhci_ops sdhci_esdhc_ops = { .get_max_clock = esdhc_pltfm_get_max_clock, .get_min_clock = esdhc_pltfm_get_min_clock, .pre_tuning = esdhc_prepare_tuning, + .post_tuning = esdhc_post_tuning, .platform_8bit_width = plt_8bit_width, .platform_clk_ctrl = plt_clk_ctrl, }; @@ -630,10 +644,9 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd host->clk_mgr_en = true; } - writel(0, host->ioaddr + SDHCI_MIX_CTRL); - reg = readl(host->ioaddr + SDHCI_VENDOR_SPEC); - reg &= ~SDHCI_VENDOR_SPEC_VSELECT; - writel(reg, host->ioaddr + SDHCI_VENDOR_SPEC); + reg = readl(host->ioaddr + SDHCI_MIX_CTRL); + reg &= ~SDHCI_MIX_CTRL_DDREN; + writel(reg, host->ioaddr + SDHCI_MIX_CTRL); /* disable card interrupt enable bit, and clear status bit * the default value of this enable bit is 1, but it should * be 0 regarding to standard host controller spec 2.1.3. |