diff options
| author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2011-02-11 04:32:33 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:51:42 -0700 |
| commit | 395b89973d0b3cb2857af1a2cccb8d5344f17a92 (patch) | |
| tree | 35ac6b7359af4fdb8c275c70e4cd99a79a9e9b7c /drivers/mmc | |
| parent | 07caac7cc7e1e644e20a794a8efd45e69abc5df7 (diff) | |
ARM:tegra: sdhci:Do Pad calibration only for t30
Pad calibration is not present in AP20. Doing this
only for T30 by checking for the config variable
CONFIG_ARCH_TEGRA_3x_SOC
Original-Change-Id: I922ae7d54928fc29c6c1aed83b2adcd36ce54ac2
Reviewed-on: http://git-master/r/19250
Reviewed-by: Jin Qian <jqian@nvidia.com>
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: Id9d4e0b8f43e464f5fa037c00679307cc4c46121
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index a2a0617f7484..cd4535c974d1 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -42,7 +42,7 @@ #define SDHCI_VENDOR_CLOCK_CNTRL_SDMMC_CLK_ENABLE 0x1 #define SDHCI_VENDOR_CLOCK_CNTRL_INPUT_IO_CLOCK_INTERNAL 0x2 #define SDHCI_VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE 0x4 -#define SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE 0x8 +#define SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE 0x8 #define SDHCI_VENDOR_CLOCK_CNTRL_TAP_VAL_SHIFT 0x10 #define SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT 0x8 @@ -52,7 +52,7 @@ #define SDMMC_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SDR50 0x10 #define SDMMC_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SD3_0_SUPPORT 0x20 -#define SDMMC_AUTO_CAL_CONFIG 0x1E4 +#define SDMMC_AUTO_CAL_CONFIG 0x1E4 #define SDMMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE 0x20000000 #endif @@ -199,10 +199,12 @@ static void tegra_sdhci_set_signalling_voltage(struct sdhci_host *sdhci, mmc_hostname(sdhci->mmc), (maxV/1000000), rc); else { if (signalling_voltage == SDHCI_POWER_180) { +#if CONFIG_ARCH_TEGRA_3x_SOC /* Do Auto Calibration */ val = sdhci_readl(sdhci, SDMMC_AUTO_CAL_CONFIG); val |= SDMMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE; sdhci_writel(sdhci, val, SDMMC_AUTO_CAL_CONFIG); +#endif } } } |