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authorYangbo Lu <yangbo.lu@freescale.com>2015-08-11 10:53:34 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2015-08-27 14:50:49 +0200
commit77bd2f6f6c65b4ad259394d416855ed561f21e8f (patch)
tree1ebaf54fa3e5cb0fccdfc54545dc5f2da8417af7 /drivers/mmc
parentd31911b9374a76560d2c8ea4aa6ce5781621e81d (diff)
mmc: sdhci-of-esdhc: add workaround for pre divider initial value
For eSDHC(version < 2.3), the pre divider only could divide base clock by 2 at least. Add workaround for this to avoid unexpected issue. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Fixes: bd455029d01c ("mmc: sdhci-of-esdhc: Pre divider starts at 1") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 797be7549a15..653f335bef15 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -208,6 +208,12 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
if (clock == 0)
return;
+ /* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */
+ temp = esdhc_readw(host, SDHCI_HOST_VERSION);
+ temp = (temp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
+ if (temp < VENDOR_V_23)
+ pre_div = 2;
+
/* Workaround to reduce the clock frequency for p1010 esdhc */
if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
if (clock > 20000000)