diff options
| author | Han Xu <han.xu@nxp.com> | 2018-11-01 15:01:27 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:53 +0800 |
| commit | 2d1187bf2f5a027275ea66ff92926f1dc1991591 (patch) | |
| tree | 297d26332dfa1623cea5efd8383ba50051ea9ceb /drivers/mtd | |
| parent | 98cc325515634c6a35e2b0a2dbf35a7d786117a6 (diff) | |
MLK-20171: mtd: flexspi: reset flexspi FLASHxCR2 registers during probe
Flexspi registers cannot be reset to default value, reset all FLASHxCR2
registers to 0 to avoid read data with invalid LUT commands.
Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/spi-nor/fsl-flexspi.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/mtd/spi-nor/fsl-flexspi.c b/drivers/mtd/spi-nor/fsl-flexspi.c index c7b4eaedda25..9519749ec441 100644 --- a/drivers/mtd/spi-nor/fsl-flexspi.c +++ b/drivers/mtd/spi-nor/fsl-flexspi.c @@ -944,7 +944,6 @@ static int fsl_flexspi_init_rpm(struct fsl_flexspi *flex) static int fsl_flexspi_nor_setup(struct fsl_flexspi *flex) { void __iomem *base = flex->iobase; - u32 reg; /* Reset the module */ writel(FLEXSPI_MCR0_SWRST_MASK, base + FLEXSPI_MCR0); @@ -959,8 +958,11 @@ static int fsl_flexspi_nor_setup(struct fsl_flexspi *flex) writel(FLEXSPI_MCR0_AHB_TIMEOUT_MASK | FLEXSPI_MCR0_IP_TIMEOUT_MASK | FLEXSPI_MCR0_OCTCOMB_EN_MASK, base + FLEXSPI_MCR0); - /* Read the register value */ - reg = readl(base + FLEXSPI_MCR0); + /* Reset the FLASHxCR2 */ + writel(0, base + FLEXSPI_FLSHA1CR2); + writel(0, base + FLEXSPI_FLSHA2CR2); + writel(0, base + FLEXSPI_FLSHB1CR2); + writel(0, base + FLEXSPI_FLSHB2CR2); /* Init the LUT table. */ fsl_flexspi_init_lut(flex); |