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authorHan Xu <b45815@freescale.com>2015-06-11 14:50:47 -0500
committerNitin Garg <nitin.garg@freescale.com>2015-09-17 09:23:40 -0500
commitd8b51cc358780f68e732522ee9bd6bd578dd6771 (patch)
tree3a2d92a67f68ee308bb786fb1c163bf1567e7cf6 /drivers/mtd
parente03fdad1c7713a7db70112e00c4ae96848accd34 (diff)
MLK-11095: mtd:qspi: clear the DDR_EN bit on 6UL and 7D
the obsolete bit DDR_EN on 6UL and 7D should be clear in case other program set the bit and cause qspi probe fail. Signed-off-by: Han Xu <b45815@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/spi-nor/fsl-quadspi.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 7a5e25262199..7ab261f03ae3 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -780,6 +780,14 @@ static int fsl_qspi_nor_setup(struct fsl_qspi *q)
if (ret)
return ret;
+ if ((q->devtype_data->devtype == FSL_QUADSPI_IMX6UL) ||
+ (q->devtype_data->devtype == FSL_QUADSPI_IMX7D)) {
+ /* clear the DDR_EN bit for 6UL and 7D */
+ reg = readl(base + QUADSPI_MCR);
+ writel(~(QUADSPI_MCR_DDR_EN_MASK) & reg, base + QUADSPI_MCR);
+ udelay(1);
+ }
+
/* Reset the module */
writel(QUADSPI_MCR_SWRSTSD_MASK | QUADSPI_MCR_SWRSTHD_MASK,
base + QUADSPI_MCR);