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author | Bruce Allan <bruce.w.allan@intel.com> | 2013-03-06 09:02:31 +0000 |
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committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2013-03-27 23:13:47 -0700 |
commit | bb034512da74dce901f738f7c7cea332ff971608 (patch) | |
tree | 946c82771e4f965025e41b52cb5ec37f4860e818 /drivers/net/ethernet/intel/e1000e/ich8lan.h | |
parent | 8b49a4c75965ed157e21450d23dcadd6b27c1aa3 (diff) |
e1000e: additional error handling on PHY register accesses
PHY reads/writes via the MDIC register could potentially return results
from a previous PHY register access. If that happens, the offset in the
returned results will be that of the previous access and if that is
different from the expected offset, log a debug message and error out.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/ich8lan.h')
0 files changed, 0 insertions, 0 deletions