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authorDavid Ertman <davidx.m.ertman@intel.com>2014-01-23 06:29:13 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2014-03-07 21:24:55 -0800
commitf7235ef66938ac3db51762c5dbab9f849fa9e795 (patch)
tree21b457d3e22bfed30826ef123fc069b41b175b3d /drivers/net/ethernet/intel/e1000e/ich8lan.h
parentb485dbaecdee2fec7d973de50a48d284dec532f1 (diff)
e1000e: Resolve issues with Management Engine (ME) briefly blocking PHY resets
On a ME enabled system with the cable out, the driver init flow would generate an erroneous message indicating that resets were being blocked by an active ME session. Cause was ME clearing the semaphore bit to block further PHY resets for up to 50 msec during power-on/cycle. After this interval, ME would re-set the bit and allow PHY resets. To resolve this, change the flow of e1000e_phy_hw_reset_generic() to utilize a delay and retry method. Poll the FWSM register to minimize any extra time added to the flow. If the delay times out at 100ms (checked in 10msec increments), then return the value E1000_BLK_PHY_RESET, as this is the accurate state of the PHY. Attempting to alter just the call to e1000e_phy_hw_reset_generic() in e1000_init_phy_workarounds_pchlan() just caused the problem to move further down the flow. Signed-off-by: Dave Ertman <davidx.m.ertman@intel.com> Acked-by: Bruce W. Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/ich8lan.h')
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