diff options
| author | Patrick Ohly <patrick.ohly@intel.com> | 2009-02-12 05:03:41 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-02-15 23:13:25 -0800 |
| commit | 38c845c7648ee354fd1d2fb8a7fbc352f2d3dcc3 (patch) | |
| tree | aa55b7d582dadb2735079f92f7fe246069647ae7 /drivers/net/igb/e1000_regs.h | |
| parent | d24fff22d8dba13cc21034144f68f213415cb7c8 (diff) | |
igb: access to NIC time
Adds the register definitions and code to read the time
register.
Signed-off-by: John Ronciak <john.ronciak@intel.com>
Signed-off-by: Patrick Ohly <patrick.ohly@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_regs.h')
| -rw-r--r-- | drivers/net/igb/e1000_regs.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h index 5038b73c78e9..64d95cd71f2e 100644 --- a/drivers/net/igb/e1000_regs.h +++ b/drivers/net/igb/e1000_regs.h @@ -75,6 +75,34 @@ #define E1000_FCRTH 0x02168 /* Flow Control Receive Threshold High - RW */ #define E1000_RDFPCQ(_n) (0x02430 + (0x4 * (_n))) #define E1000_FCRTV 0x02460 /* Flow Control Refresh Timer Value - RW */ + +/* IEEE 1588 TIMESYNCH */ +#define E1000_TSYNCTXCTL 0x0B614 +#define E1000_TSYNCRXCTL 0x0B620 +#define E1000_TSYNCRXCFG 0x05F50 + +#define E1000_SYSTIML 0x0B600 +#define E1000_SYSTIMH 0x0B604 +#define E1000_TIMINCA 0x0B608 + +#define E1000_RXMTRL 0x0B634 +#define E1000_RXSTMPL 0x0B624 +#define E1000_RXSTMPH 0x0B628 +#define E1000_RXSATRL 0x0B62C +#define E1000_RXSATRH 0x0B630 + +#define E1000_TXSTMPL 0x0B618 +#define E1000_TXSTMPH 0x0B61C + +#define E1000_ETQF0 0x05CB0 +#define E1000_ETQF1 0x05CB4 +#define E1000_ETQF2 0x05CB8 +#define E1000_ETQF3 0x05CBC +#define E1000_ETQF4 0x05CC0 +#define E1000_ETQF5 0x05CC4 +#define E1000_ETQF6 0x05CC8 +#define E1000_ETQF7 0x05CCC + /* Split and Replication RX Control - RW */ /* * Convenience macros |