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authorRisto Suominen <risto.suominen@gmail.com>2009-06-10 09:55:00 +0000
committerDavid S. Miller <davem@davemloft.net>2009-06-11 02:32:41 -0700
commitb77e5228849fdcd7a5d73beb16b9ad99395236ec (patch)
tree3a5bc41d328882fab6fd6e2f48fd72f6bda3b308 /drivers/net/tulip
parentef5c89967d50042b29937fb724e057c1aa3c5207 (diff)
de2104x: support for systems lacking cache coherence
Add a configurable Descriptor Skip Length for systems that lack cache coherence. (akpm: I think this should be done as a module parameter, not a compile-tinme option) Signed-off-by: Risto Suominen <Risto.Suominen@gmail.com> Cc: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tulip')
-rw-r--r--drivers/net/tulip/Kconfig12
-rw-r--r--drivers/net/tulip/de2104x.c13
2 files changed, 24 insertions, 1 deletions
diff --git a/drivers/net/tulip/Kconfig b/drivers/net/tulip/Kconfig
index d913405bc393..1cc8cf4425d1 100644
--- a/drivers/net/tulip/Kconfig
+++ b/drivers/net/tulip/Kconfig
@@ -27,6 +27,18 @@ config DE2104X
To compile this driver as a module, choose M here. The module will
be called de2104x.
+config DE2104X_DSL
+ int "Descriptor Skip Length in 32 bit longwords"
+ depends on DE2104X
+ range 0 31
+ default 0
+ help
+ Setting this value allows to align ring buffer descriptors into their
+ own cache lines. Value of 4 corresponds to the typical 32 byte line
+ (the descriptor is 16 bytes). This is necessary on systems that lack
+ cache coherence, an example is PowerMac 5500. Otherwise 0 is safe.
+ Default is 0, and range is 0 to 31.
+
config TULIP
tristate "DECchip Tulip (dc2114x) PCI support"
depends on PCI
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c
index d4c5ecc51f77..e7609a05032d 100644
--- a/drivers/net/tulip/de2104x.c
+++ b/drivers/net/tulip/de2104x.c
@@ -82,6 +82,13 @@ MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copi
NETIF_MSG_RX_ERR | \
NETIF_MSG_TX_ERR)
+/* Descriptor skip length in 32 bit longwords. */
+#ifndef CONFIG_DE2104X_DSL
+#define DSL 0
+#else
+#define DSL CONFIG_DE2104X_DSL
+#endif
+
#define DE_RX_RING_SIZE 64
#define DE_TX_RING_SIZE 64
#define DE_RING_BYTES \
@@ -153,6 +160,7 @@ enum {
CmdReset = (1 << 0),
CacheAlign16 = 0x00008000,
BurstLen4 = 0x00000400,
+ DescSkipLen = (DSL << 2),
/* Rx/TxPoll bits */
NormalTxPoll = (1 << 0),
@@ -246,7 +254,7 @@ static const u32 de_intr_mask =
* Set the programmable burst length to 4 longwords for all:
* DMA errors result without these values. Cache align 16 long.
*/
-static const u32 de_bus_mode = CacheAlign16 | BurstLen4;
+static const u32 de_bus_mode = CacheAlign16 | BurstLen4 | DescSkipLen;
struct de_srom_media_block {
u8 opts;
@@ -266,6 +274,9 @@ struct de_desc {
__le32 opts2;
__le32 addr1;
__le32 addr2;
+#if DSL
+ __le32 skip[DSL];
+#endif
};
struct media_info {