Merge tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

From Kukjin Kim:
Update exynos DT for
- usb3phy and dwc3 for exynos5250
- keypad for exynos4412
- TMU clock for exynos4210
- MFC clock for exynos4
- DP controller for exynos5250
- G2D clock for exynos4
- some exynos boards

* tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (456 commits)
  ARM: dts: add ohci and ehci controller nodes for EXYNOS5440
  ARM: dts: Update G2D documentation for clock entries
  ARM: dts: Add clock entries to G2D node for exynos4x12
  ARM: dts: Add clock entries to G2D node for exynos4210
  ARM: dts: Remove duplicate and add missing G2D nodes
  clk: exynos4: Add additional G2D clocks
  ARM: dts: Document DP clock in samsung,exynos5-dp binding
  ARM: dts: add pin state information for DP HPD support to Exynos5250
  ARM: dts: add dts node for the ahci sata exynos5440
  ARM: dts: add vmmc regulator support for ODROID-X
  ARM: dts: add max77686 node entry for ODROID-X
  ARM: dts: Enable RTC by default on EXYNOS5440
  ARM: dts: Add display timing node to exynos5250-arndale.dts
  ARM: dts: Add clock provider information for DP controller in Exynos5250 SoC
  ARM: dts: Add DT node for DP controller for Arndale Board
  ARM: dts: Remove combiner IRQ node from exynos4x12.dtsi
  ARM: dts: add max8997 device node for exynos4210-origen board
  ARM: dts: Enable TMU on Origen4210 board
  ARM: dts: Add TMU clock entries to exynos4210.dtsi
  ARM: dts: Update MFC documentation for clock entries
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 17 insertions, 8 deletions

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 7f25da8444fe..15dfefcf2d0f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1172,6 +1172,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan)
 static inline void ath9k_hw_set_dma(struct ath_hw *ah)
 {
 	struct ath_common *common = ath9k_hw_common(ah);
+	int txbuf_size;
 
 	ENABLE_REGWRITE_BUFFER(ah);
 
@@ -1225,13 +1226,17 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah)
 		 * So set the usable tx buf size also to half to
 		 * avoid data/delimiter underruns
 		 */
-		REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
-			  AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE);
-	} else if (!AR_SREV_9271(ah)) {
-		REG_WRITE(ah, AR_PCU_TXBUF_CTRL,
-			  AR_PCU_TXBUF_CTRL_USABLE_SIZE);
+		txbuf_size = AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE;
+	} else if (AR_SREV_9340_13_OR_LATER(ah)) {
+		/* Uses fewer entries for AR934x v1.3+ to prevent rx overruns */
+		txbuf_size = AR_9340_PCU_TXBUF_CTRL_USABLE_SIZE;
+	} else {
+		txbuf_size = AR_PCU_TXBUF_CTRL_USABLE_SIZE;
 	}
 
+	if (!AR_SREV_9271(ah))
+		REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size);
+
 	REGWRITE_BUFFER_FLUSH(ah);
 
 	if (AR_SREV_9300_20_OR_LATER(ah))
@@ -1306,9 +1311,13 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
 			AR_RTC_RC_COLD_RESET | AR_RTC_RC_WARM_RESET;
 	} else {
 		tmpReg = REG_READ(ah, AR_INTR_SYNC_CAUSE);
-		if (tmpReg &
-		    (AR_INTR_SYNC_LOCAL_TIMEOUT |
-		     AR_INTR_SYNC_RADM_CPL_TIMEOUT)) {
+		if (AR_SREV_9340(ah))
+			tmpReg &= AR9340_INTR_SYNC_LOCAL_TIMEOUT;
+		else
+			tmpReg &= AR_INTR_SYNC_LOCAL_TIMEOUT |
+				  AR_INTR_SYNC_RADM_CPL_TIMEOUT;
+
+		if (tmpReg) {
 			u32 val;
 			REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);