diff options
| author | Michael Buesch <mb@bu3sch.de> | 2007-12-12 22:05:18 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-01-28 15:05:59 -0800 |
| commit | 38d1b4ce901506729f6c7f9a14f02f4327c577cc (patch) | |
| tree | c7b55f18baea728ebad228b2ec5d5eeaeedb36b2 /drivers/net/wireless/b43/phy.h | |
| parent | 8ed7fc48eb31e583bb31c2bcfdd3a9c557bad5d0 (diff) | |
b43: Fix for broken transmission
This patch fixes the transmission problems introduced by
commit f04b3787bbce4567e28069a9ec97dcd804626ac7
I'm not sure if the dummy read is really required.
The old code does it. I think it can't hurt and can possibly
fix some write posting problems (hardware bugs or whatever. Who knows).
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy.h')
| -rw-r--r-- | drivers/net/wireless/b43/phy.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/wireless/b43/phy.h b/drivers/net/wireless/b43/phy.h index 1c7eac25a302..3525f5652460 100644 --- a/drivers/net/wireless/b43/phy.h +++ b/drivers/net/wireless/b43/phy.h @@ -25,7 +25,7 @@ struct b43_phy; #define B43_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */ #define B43_PHY_BBANDCFG_RXANT_SHIFT 7 #define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */ -#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */ +#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 (phy.rev 1 only) */ #define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */ #define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */ #define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */ @@ -69,8 +69,8 @@ struct b43_phy; #define B43_PHY_DIVP1P2GAIN B43_PHY_OFDM(0xAB) #define B43_PHY_DIVSRCHGAINBACK B43_PHY_OFDM(0xAD) /* Divider search gain back */ #define B43_PHY_DIVSRCHGAINCHNG B43_PHY_OFDM(0xAE) /* Divider search gain change */ -#define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */ -#define B43_PHY_CRSTHRES2_R1 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */ +#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0xC0) /* CRS Threshold 1 (phy.rev >= 2 only) */ +#define B43_PHY_CRSTHRES2 B43_PHY_OFDM(0xC1) /* CRS Threshold 2 (phy.rev >= 2 only) */ #define B43_PHY_TSSIP_LTBASE B43_PHY_OFDM(0x380) /* TSSI power lookup table base */ #define B43_PHY_DC_LTBASE B43_PHY_OFDM(0x3A0) /* DC lookup table base */ #define B43_PHY_GAIN_LTBASE B43_PHY_OFDM(0x3C0) /* Gain lookup table base */ |