diff options
| author | Sudeep Holla <sudeep.holla@arm.com> | 2017-01-16 10:40:43 +0000 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2017-01-17 12:09:33 +0000 |
| commit | 5fa23530d4fcc7e84be9a557c58d0e670a15c042 (patch) | |
| tree | dff3ea90c8394ea33411d1ac31b71d04cb43fc4b /drivers/of/base.c | |
| parent | fa5ce3d1928c441c3d241c34a00c07c8f5880b1a (diff) | |
of: base: add support to find the level of the last cache
It is useful to have helper function just to get the number of cache
levels for a given logical cpu. We can obtain the same by just checking
the level at which the last cache is present. This patch adds support
to find the level of the last cache for a given cpu.
It will be used on ARM64 platform where the device tree provides the
information for the additional non-architected/transparent/external
last level caches that are not integrated with the processors.
Cc: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Rob Herring <robh+dt@kernel.org>
Tested-by: Tan Xiaojun <tanxiaojun@huawei.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
[will: use u32 instead of int for cache_level]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/of/base.c')
| -rw-r--r-- | drivers/of/base.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/of/base.c b/drivers/of/base.c index d4bea3c797d6..a641b1faf057 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -25,6 +25,7 @@ #include <linux/cpu.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <linux/of_graph.h> #include <linux/spinlock.h> #include <linux/slab.h> @@ -2268,6 +2269,31 @@ struct device_node *of_find_next_cache_node(const struct device_node *np) } /** + * of_find_last_cache_level - Find the level at which the last cache is + * present for the given logical cpu + * + * @cpu: cpu number(logical index) for which the last cache level is needed + * + * Returns the the level at which the last cache is present. It is exactly + * same as the total number of cache levels for the given logical cpu. + */ +int of_find_last_cache_level(unsigned int cpu) +{ + u32 cache_level = 0; + struct device_node *prev = NULL, *np = of_cpu_device_node_get(cpu); + + while (np) { + prev = np; + of_node_put(np); + np = of_find_next_cache_node(np); + } + + of_property_read_u32(prev, "cache-level", &cache_level); + + return cache_level; +} + +/** * of_graph_parse_endpoint() - parse common endpoint node properties * @node: pointer to endpoint device_node * @endpoint: pointer to the OF endpoint data structure |