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authorStephen Hemminger <shemminger@linux-foundation.org>2007-06-06 11:50:34 +0800
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 16:02:08 -0700
commitf0dce411930d16a678173e534594bca160f5eaff (patch)
tree52d7c4d6d4e374ac3b808f4f7a9b0ba7be729234 /drivers/pci/pcie
parent65b3bc358a3195ebe459761a248cf33a61539947 (diff)
PCI aer: add pci_cleanup_aer_correct_aer_status
Function to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status. The Marvell chips seem to start out with a bogus value that needs to be cleared. Yanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Acked-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/pcie')
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index fef159a68081..92a8469b21ba 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -117,6 +117,21 @@ int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
return 0;
}
+int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
+{
+ int pos;
+ u32 status;
+
+ pos = pci_find_aer_capability(dev);
+ if (!pos)
+ return -EIO;
+
+ pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
+ pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status);
+
+ return 0;
+}
+
static int find_device_iter(struct device *device, void *data)
{
struct pci_dev *dev;
@@ -741,4 +756,5 @@ EXPORT_SYMBOL_GPL(pci_find_aer_capability);
EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
+EXPORT_SYMBOL_GPL(pci_cleanup_aer_correct_error_status);