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authorBjorn Helgaas <bhelgaas@google.com>2014-02-26 11:26:00 -0700
committerBjorn Helgaas <bhelgaas@google.com>2014-02-27 10:43:33 -0700
commitc83bd900aac38552b0d903588bbb084d3b26fe71 (patch)
treef3ffd1cc8338df9f8449605acd70c35b6bcbd59d /drivers/pci/probe.c
parent29003beb7f15d3daa5a8f9afb8d007b64baa2357 (diff)
PCI: Mark 64-bit resource as IORESOURCE_UNSET if we only support 32-bit
If we don't support 64-bit addresses, i.e., CONFIG_PHYS_ADDR_T_64BIT is not set, we can't deal with BARs above 4GB. In this case we already pretend the BAR contained zero; this patch also sets IORESOURCE_UNSET so we can try to reallocate it later. I don't think this is exactly correct: what we care about here are *bus* addresses, not CPU addresses, so the tests of sizeof(resource_size_t) probably should be on sizeof(dma_addr_t) instead. But this is what's been in -next, so we'll fix that later. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 6e34498ec9f0..78335efbbb74 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -252,6 +252,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
/* Address above 32-bit boundary; disable the BAR */
pci_write_config_dword(dev, pos, 0);
pci_write_config_dword(dev, pos + 4, 0);
+ res->flags |= IORESOURCE_UNSET;
region.start = 0;
region.end = sz64;
bar_disabled = true;