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authorRichard Zhu <hongxing.zhu@nxp.com>2017-04-10 13:36:23 +0800
committerAnson Huang <Anson.Huang@nxp.com>2017-06-09 22:18:48 +0800
commit2ff4e3748c23e0076eae4e21789227428c977468 (patch)
tree62ea3693d0e50585a8de5359e9cd116630be9c94 /drivers/pci
parent694a60ceb1cbb503fbb47cd8b1ee607f05f1b3ce (diff)
MLK-14644 PCI: imx: toggle the perst after the release of rc's reset
imxcommunity reports that Intel Wireless 3160 doesn't work if the perst# is toggled before the release of rc controller's reset. Specification doesn't specify the exactly sequence of the toggle of the perst# and the release of the rc controller reset. Just find the following description in the chapter 4.2.2 of the PCI Local Bus Specification. "The system must guarantee that the bus remains in the idle state for a minimum time delay following the deassertion of RST# to a device before the system will permit the first assertion of FRAME#." Toggle the perst# after the release of rc's reset to fix the issue. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> (cherry picked from commit ba75c5e4795ab36d7765fe3ac03f0c4320828c78)
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pci-imx6.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index d81e2afed251..b0b369e1c0fe 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -460,16 +460,6 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
/* allow the clocks to stabilize */
udelay(200);
- /* Some boards don't have PCIe reset GPIO. */
- if (gpio_is_valid(imx6_pcie->reset_gpio)) {
- gpio_set_value_cansleep(imx6_pcie->reset_gpio,
- imx6_pcie->gpio_active_high);
- mdelay(20);
- gpio_set_value_cansleep(imx6_pcie->reset_gpio,
- !imx6_pcie->gpio_active_high);
- mdelay(20);
- }
-
switch (imx6_pcie->variant) {
case IMX6SX:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,
@@ -540,6 +530,16 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
break;
}
+ /* Some boards don't have PCIe reset GPIO. */
+ if (gpio_is_valid(imx6_pcie->reset_gpio)) {
+ gpio_set_value_cansleep(imx6_pcie->reset_gpio,
+ imx6_pcie->gpio_active_high);
+ mdelay(20);
+ gpio_set_value_cansleep(imx6_pcie->reset_gpio,
+ !imx6_pcie->gpio_active_high);
+ mdelay(20);
+ }
+
return;
err_ref_clk: