diff options
| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-03-18 22:31:53 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-04-09 09:42:25 +0200 |
| commit | 43fc9e7fab903ea3c525c693c5e9bf566d521380 (patch) | |
| tree | 26f7d9ccb1e1ee260981e6382a9a6f772601b57a /drivers/pinctrl/pinctrl-exynos.c | |
| parent | 499147c9dbceee27c63bf8e6b604aca1737e9e0c (diff) | |
pinctrl: samsung: Remove hardcoded register offsets
This patch replaces statically hardcoded register offsets of Exynos SoCs
with an array of register offsets in samsung_pin_bank_type struct.
Thanks to this change, support for SoCs with other set and order of
registers can be added (e.g. S3C24xx and S3C64xx).
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-exynos.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-exynos.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index b5dbb87800fd..8b10b1ac9071 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -37,10 +37,12 @@ static struct samsung_pin_bank_type bank_type_off = { .fld_width = { 4, 1, 2, 2, 2, 2, }, + .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, }; static struct samsung_pin_bank_type bank_type_alive = { .fld_width = { 4, 1, 2, 2, }, + .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, }; /* list of external wakeup controllers supported */ @@ -126,7 +128,7 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) con |= trig_type << shift; writel(con, d->virt_base + reg_con); - reg_con = bank->pctl_offset; + reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; @@ -309,7 +311,7 @@ static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type) con |= trig_type << shift; writel(con, d->virt_base + reg_con); - reg_con = bank->pctl_offset; + reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; |