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authorTomasz Figa <t.figa@samsung.com>2012-10-11 10:11:16 +0200
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 09:10:12 +0200
commit595be7268a85735d229451821b56f122d09d7bdc (patch)
treeeefa13ddc638a1fc5e987dee179ac951aea7b90b /drivers/pinctrl/pinctrl-samsung.h
parent1b6056d6db2426cd612f03dabacf655ecb6a27ae (diff)
pinctrl: exynos: Use one IRQ domain per pin bank
Instead of registering one IRQ domain for all pin banks of a pin controller, this patch implements registration of per-bank domains. At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts of Exynos4x12) it simplifies driver code and device tree sources, because GPIO interrupts can be now specified per banks. Example: device { /* ... */ interrupt-parent = <&gpa1>; interrupts = <3 0>; /* ... */ }; Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-samsung.h')
-rw-r--r--drivers/pinctrl/pinctrl-samsung.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h
index d77d9bcc5d7d..e56be22302cd 100644
--- a/drivers/pinctrl/pinctrl-samsung.h
+++ b/drivers/pinctrl/pinctrl-samsung.h
@@ -109,10 +109,10 @@ struct samsung_pinctrl_drv_data;
* @conpdn_width: width of the sleep mode function selector bin field.
* @pudpdn_width: width of the sleep mode pull up/down selector bit field.
* @eint_type: type of the external interrupt supported by the bank.
- * @irq_base: starting controller local irq number of the bank.
* @name: name to be prefixed for each pin in this pin bank.
* @of_node: OF node of the bank.
* @drvdata: link to controller driver data
+ * @irq_domain: IRQ domain of the bank.
*/
struct samsung_pin_bank {
u32 pctl_offset;
@@ -125,10 +125,10 @@ struct samsung_pin_bank {
u8 pudpdn_width;
enum eint_type eint_type;
u32 eint_offset;
- u32 irq_base;
char *name;
struct device_node *of_node;
struct samsung_pinctrl_drv_data *drvdata;
+ struct irq_domain *irq_domain;
};
/**
@@ -137,7 +137,6 @@ struct samsung_pin_bank {
* @nr_banks: number of pin banks.
* @base: starting system wide pin number.
* @nr_pins: number of pins supported by the controller.
- * @nr_gint: number of external gpio interrupts supported.
* @nr_wint: number of external wakeup interrupts supported.
* @geint_con: offset of the ext-gpio controller registers.
* @geint_mask: offset of the ext-gpio interrupt mask registers.
@@ -158,7 +157,6 @@ struct samsung_pin_ctrl {
u32 base;
u32 nr_pins;
- u32 nr_gint;
u32 nr_wint;
u32 geint_con;
@@ -205,7 +203,6 @@ struct samsung_pinctrl_drv_data {
const struct samsung_pmx_func *pmx_functions;
unsigned int nr_functions;
- struct irq_domain *gpio_irqd;
struct irq_domain *wkup_irqd;
struct gpio_chip *gc;