diff options
| author | Mohan T <mohant@nvidia.com> | 2014-01-03 00:39:18 +0530 |
|---|---|---|
| committer | Bitan Biswas <bbiswas@nvidia.com> | 2014-01-03 11:24:12 -0800 |
| commit | e41d9838c8b4a2b269b376a3e20330c07cac391e (patch) | |
| tree | f4557888726cce79f065d1cba9cb8bf7a45f2db9 /drivers/pinctrl | |
| parent | f4a063081552617e72cbdda5596ae7bd537696f7 (diff) | |
ARM: tegra: pinmux: correct pinmux resume sequence
Do not operate on DPD pads and do not TRISTATE
pins before restoring for T124
Bug 1416263
Bug 1429819
Change-Id: I7261c7e5d4341f6d74dadf1ab6af985e7965b860
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/351369
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-tegra124.c | 29 |
1 files changed, 16 insertions, 13 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra124.c b/drivers/pinctrl/pinctrl-tegra124.c index 2da5478b3895..24ed49f58eac 100644 --- a/drivers/pinctrl/pinctrl-tegra124.c +++ b/drivers/pinctrl/pinctrl-tegra124.c @@ -1,7 +1,7 @@ /* * Pinctrl data for the NVIDIA Tegra124 pinmux * - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -3329,20 +3329,23 @@ static void tegra124_pinctrl_resume(u32 *pg_data) { int i; u32 *ctx = pg_data; - u32 *tmp = pg_data; - u32 reg_value; - - for (i = 0; i < ARRAY_SIZE(tegra124_groups); i++) { - if (tegra124_groups[i].drv_reg < 0) { - reg_value = *tmp++; - reg_value |= BIT(4); - tegra_pinctrl_writel(reg_value, - tegra124_groups[i].mux_bank, - tegra124_groups[i].mux_reg); + + if (tegra_is_dpd_mode) { + u32 *tmp = pg_data; + u32 reg_value; + for (i = 0; i < ARRAY_SIZE(tegra124_groups); i++) { + if (tegra124_groups[i].drv_reg < 0) { + reg_value = *tmp++; + reg_value |= BIT(4); + tegra_pinctrl_writel(reg_value, + tegra124_groups[i].mux_bank, + tegra124_groups[i].mux_reg); + } } - } - tegra_pmc_remove_dpd_req(); + tegra_pmc_remove_dpd_req(); + tegra_is_dpd_mode = false; + } for (i = 0; i < ARRAY_SIZE(tegra124_groups); i++) { if (tegra124_groups[i].drv_reg < 0) tegra_pinctrl_writel(*ctx++, tegra124_groups[i].mux_bank, |