diff options
author | Bharat Nihalani <bnihalani@nvidia.com> | 2014-04-14 15:09:45 +0530 |
---|---|---|
committer | Hiroshi Doyu <hdoyu@nvidia.com> | 2014-04-14 05:45:15 -0700 |
commit | 58edcc912c8e9c61711150c814b1344e91ac10a4 (patch) | |
tree | 43bd9cbd7bb03a5cf8b81897a84df5c23615da1d /drivers/platform | |
parent | 720c60aef1859b9c0d913c131203e02e6af4c3e6 (diff) |
Revert "ARM: tegra: MC: Add DT support"
This reverts commit c2a9dbc2494b51ca7b50cb4fae6101c489a00873 since
it causes LP0 to be broken on T132 platforms.
Bug 1499478
Change-Id: If1279494cc10f647f1b7b84cfd6aeb88b8393e6c
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/395778
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r-- | drivers/platform/tegra/mc/mc.c | 153 | ||||
-rw-r--r-- | drivers/platform/tegra/mc/mcerr-t11.c | 4 | ||||
-rw-r--r-- | drivers/platform/tegra/mc/mcerr-t12.c | 4 | ||||
-rw-r--r-- | drivers/platform/tegra/mc/mcerr-t14.c | 4 | ||||
-rw-r--r-- | drivers/platform/tegra/mc/mcerr.c | 63 |
5 files changed, 37 insertions, 191 deletions
diff --git a/drivers/platform/tegra/mc/mc.c b/drivers/platform/tegra/mc/mc.c index 3d14dcdfc530..e1cdd7637d3e 100644 --- a/drivers/platform/tegra/mc/mc.c +++ b/drivers/platform/tegra/mc/mc.c @@ -25,9 +25,6 @@ #include <linux/delay.h> #include <linux/debugfs.h> #include <linux/tegra-soc.h> -#include <linux/of_device.h> -#include <linux/of_address.h> -#include <linux/platform_device.h> #include <mach/mc.h> #include <mach/mcerr.h> @@ -51,14 +48,10 @@ #endif static DEFINE_SPINLOCK(tegra_mc_lock); -int mc_channels; -void __iomem *mc; - -/* Only populated if there are 2 channels. */ -void __iomem *mc0; -void __iomem *mc1; - -int mc_intr_count; +void __iomem *mc = (void __iomem *)IO_ADDRESS(TEGRA_MC_BASE); +#ifdef MC_DUAL_CHANNEL +void __iomem *mc1 = (void __iomem *)IO_ADDRESS(TEGRA_MC1_BASE); +#endif #ifdef CONFIG_PM_SLEEP static u32 mc_boot_timing[MC_TIMING_REG_NUM1 + MC_TIMING_REG_NUM2 @@ -205,9 +198,6 @@ int tegra_mc_flush(int id) unsigned long flags; bool ret; - if (!mc) - return 0; - if (id < 32) { rst_ctrl_reg = MC_CLIENT_HOTRESET_CTRL; rst_stat_reg = MC_CLIENT_HOTRESET_STAT; @@ -243,9 +233,6 @@ int tegra_mc_flush_done(int id) u32 rst_ctrl_reg, rst_stat_reg; unsigned long flags; - if (!mc) - return 0; - if (id < 32) { rst_ctrl_reg = MC_CLIENT_HOTRESET_CTRL; rst_stat_reg = MC_CLIENT_HOTRESET_STAT; @@ -262,116 +249,22 @@ int tegra_mc_flush_done(int id) mc_writel(rst_ctrl, rst_ctrl_reg); spin_unlock_irqrestore(&tegra_mc_lock, flags); + return 0; } EXPORT_SYMBOL(tegra_mc_flush_done); /* - * Map an MC register space. Each MC has a set of register ranges which must - * be parsed. The first starting address in the set of ranges is returned as - * it is expected that the DT file has the register ranges in ascending - * order. - * - * device 0 = global channel. - * device n = specific channel device-1, e.g device = 1 ==> channel 0. - */ -static void __iomem *tegra_mc_map_regs(struct platform_device *pdev, int device) -{ - const void *prop; - void __iomem *regs; - void __iomem *regs_start = NULL; - u32 reg_ranges; - int i, start; - - prop = of_get_property(pdev->dev.of_node, "reg-ranges", NULL); - if (!prop) { - pr_err("Failed to get MC MMIO region\n"); - pr_err(" device = %d: missing reg-ranges\n", device); - return NULL; - } - - reg_ranges = be32_to_cpup(prop); - start = device * reg_ranges; - - for (i = 0; i < reg_ranges; i++) { - regs = of_iomap(pdev->dev.of_node, start + i); - if (!regs) { - pr_err("Failed to get MC MMIO region\n"); - pr_err(" device = %d, range = %u\n", device, i); - return NULL; - } - - if (i == 0) - regs_start = regs; - } - - return regs_start; -} - -static const struct of_device_id mc_of_ids[] = { - { .compatible = "nvidia,tegra-mc" }, - { } -}; - -/* * MC driver init. */ -static int tegra_mc_probe(struct platform_device *pdev) +static int __init tegra_mc_init(void) { #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \ defined(CONFIG_TEGRA_MC_EARLY_ACK) u32 reg; #endif - const void *prop; struct dentry *mc_debugfs_dir; - const struct of_device_id *match; - - if (!pdev->dev.of_node) - return -EINVAL; - - match = of_match_device(mc_of_ids, &pdev->dev); - if (!match) { - pr_err("Missing DT entry!\n"); - return -EINVAL; - } - - /* - * Channel count. - */ - prop = of_get_property(pdev->dev.of_node, "channels", NULL); - if (!prop) - mc_channels = 1; - else - mc_channels = be32_to_cpup(prop); - - if (mc_channels != 1 && mc_channels != 2) { - pr_err("Invalid number of memory channels: %d\n", mc_channels); - return -EINVAL; - } - - /* - * IO mem. - */ - mc = tegra_mc_map_regs(pdev, 0); - if (!mc) - return -ENOMEM; - pr_info("MC mapped MMIO address: 0x%p\n", mc); - - if (mc_dual_channel()) { - mc0 = tegra_mc_map_regs(pdev, 1); - if (!mc0) { - pr_err("Failed to make channel 0\n"); - return -ENOMEM; - } - pr_info("MC0 mapped MMIO address: 0x%p\n", mc0); - mc1 = tegra_mc_map_regs(pdev, 2); - if (!mc1) { - pr_err("Failed to make channel 0\n"); - return -ENOMEM; - } - pr_info("MC1 mapped MMIO address: 0x%p\n", mc1); - } tegra_mc_timing_save(); @@ -397,40 +290,8 @@ static int tegra_mc_probe(struct platform_device *pdev) return PTR_ERR(mc_debugfs_dir); } - tegra_mcerr_init(mc_debugfs_dir, pdev); - - return 0; -} - -static int tegra_mc_remove(struct platform_device *pdev) -{ - return 0; -} - -static struct platform_driver mc_driver = { - .driver = { - .name = "tegra-mc", - .of_match_table = mc_of_ids, - .owner = THIS_MODULE, - }, - - .probe = tegra_mc_probe, - .remove = tegra_mc_remove, -}; - -static int __init tegra_mc_init(void) -{ - int ret; - - ret = platform_driver_register(&mc_driver); - if (ret) - return ret; + tegra_mcerr_init(mc_debugfs_dir); return 0; } arch_initcall(tegra_mc_init); - -static void __exit tegra_mc_fini(void) -{ -} -module_exit(tegra_mc_fini); diff --git a/drivers/platform/tegra/mc/mcerr-t11.c b/drivers/platform/tegra/mc/mcerr-t11.c index 368e70a4ee4b..5cfc1b9b8e22 100644 --- a/drivers/platform/tegra/mc/mcerr-t11.c +++ b/drivers/platform/tegra/mc/mcerr-t11.c @@ -128,7 +128,7 @@ static void mcerr_t11x_info_update(struct mc_client *c, u32 stat) if (stat & MC_INT_SECERR_SEC) c->intr_counts[4]++; - if (stat & ~mc_int_mask) + if (stat & ~MC_INT_EN_MASK) c->intr_counts[5]++; } @@ -164,7 +164,7 @@ static int mcerr_t11x_debugfs_show(struct seq_file *s, void *v) if (strcmp(mc_clients[i].name, "dummy") == 0) continue; /* Only print clients who actually have errors. */ - for (j = 0; j < mc_intr_count; j++) { + for (j = 0; j < INTR_COUNT; j++) { if (mc_clients[i].intr_counts[j]) { do_print = 1; break; diff --git a/drivers/platform/tegra/mc/mcerr-t12.c b/drivers/platform/tegra/mc/mcerr-t12.c index 802bf6c9ef55..0a2dde60e8aa 100644 --- a/drivers/platform/tegra/mc/mcerr-t12.c +++ b/drivers/platform/tegra/mc/mcerr-t12.c @@ -162,7 +162,7 @@ static void mcerr_t12x_info_update(struct mc_client *c, u32 stat) if (stat & MC_INT_DECERR_MTS) c->intr_counts[6]++; - if (stat & ~mc_int_mask) + if (stat & ~MC_INT_EN_MASK) c->intr_counts[7]++; } @@ -182,7 +182,7 @@ static int mcerr_t12x_debugfs_show(struct seq_file *s, void *v) if (strcmp(mc_clients[i].name, "dummy") == 0) continue; /* Only print clients who actually have errors. */ - for (j = 0; j < mc_intr_count; j++) { + for (j = 0; j < INTR_COUNT; j++) { if (mc_clients[i].intr_counts[j]) { do_print = 1; break; diff --git a/drivers/platform/tegra/mc/mcerr-t14.c b/drivers/platform/tegra/mc/mcerr-t14.c index 6f07a5419dd6..4400f8a4e7af 100644 --- a/drivers/platform/tegra/mc/mcerr-t14.c +++ b/drivers/platform/tegra/mc/mcerr-t14.c @@ -139,7 +139,7 @@ static void mcerr_t14x_info_update(struct mc_client *c, u32 stat) if (stat & MC_INT_DECERR_BBC) c->intr_counts[6]++; - if (stat & ~mc_int_mask) + if (stat & ~MC_INT_EN_MASK) c->intr_counts[7]++; } @@ -159,7 +159,7 @@ static int mcerr_t14x_debugfs_show(struct seq_file *s, void *v) if (strcmp(mc_clients[i].name, "dummy") == 0) continue; /* Only print clients who actually have errors. */ - for (j = 0; j < mc_intr_count; j++) { + for (j = 0; j < INTR_COUNT; j++) { if (mc_clients[i].intr_counts[j]) { do_print = 1; break; diff --git a/drivers/platform/tegra/mc/mcerr.c b/drivers/platform/tegra/mc/mcerr.c index 00372ae1cefe..5aa8c4a5da5a 100644 --- a/drivers/platform/tegra/mc/mcerr.c +++ b/drivers/platform/tegra/mc/mcerr.c @@ -31,8 +31,7 @@ #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/moduleparam.h> -#include <linux/platform_device.h> -#include <linux/of_irq.h> +#include <linux/spinlock_types.h> #include <mach/mc.h> #include <mach/irqs.h> @@ -133,8 +132,6 @@ static DECLARE_DELAYED_WORK(unthrottle_prints_work, unthrottle_prints); static struct dentry *mcerr_debugfs_dir; -u32 mc_int_mask; - /* * Chip specific functions. */ @@ -201,16 +198,16 @@ static irqreturn_t tegra_mc_error_isr(int irq, void *data) cancel_delayed_work(&unthrottle_prints_work); - if (mc_dual_channel()) { - /* - * Interrupts can come from either MC; handle the case in which - * the interrupt is generated by the second MC. - */ - if (intr & MC_INT_EXT_INTR_IN) { - err_mc = 1; - intr = __mc_readl(err_mc, MC_INT_STATUS); - } +#ifdef MC_DUAL_CHANNEL + /* + * Interrupts can come from either MC; handle the case in which the + * interrupt is generated by the second MC. + */ + if (intr & MC_INT_EXT_INTR_IN) { + err_mc = 1; + intr = __mc_readl(err_mc, MC_INT_STATUS); } +#endif /* * Sometimes the MC seems to generate spurious interrupts - that @@ -222,7 +219,7 @@ static irqreturn_t tegra_mc_error_isr(int irq, void *data) goto out; } - intr &= mc_int_mask; + intr &= MC_INT_EN_MASK; if (intr & MC_INT_ARBITRATION_EMEM) { arb_intr(); if (intr == MC_INT_ARBITRATION_EMEM) @@ -234,9 +231,9 @@ static irqreturn_t tegra_mc_error_isr(int irq, void *data) count = ++error_count; spin_unlock(&mc_lock); - fault = chip_specific.mcerr_info(intr & mc_int_mask); + fault = chip_specific.mcerr_info(intr & MC_INT_EN_MASK); if (WARN(!fault, "[mcerr] Unknown error! intr sig: 0x%08x\n", - intr & mc_int_mask)) + intr & MC_INT_EN_MASK)) goto out; if (fault->flags & E_NO_STATUS) { @@ -265,7 +262,7 @@ static irqreturn_t tegra_mc_error_isr(int irq, void *data) else smmu_info = NULL; - chip_specific.mcerr_info_update(client, intr & mc_int_mask); + chip_specific.mcerr_info_update(client, intr & MC_INT_EN_MASK); if (mcerr_throttle_enabled && count >= MAX_PRINTS) { schedule_delayed_work(&unthrottle_prints_work, HZ/2); @@ -308,7 +305,7 @@ static void mcerr_default_info_update(struct mc_client *c, u32 stat) c->intr_counts[2]++; /* Unknown interrupts. */ - if (stat & ~mc_int_mask) + if (stat & ~MC_INT_EN_MASK) c->intr_counts[3]++; } @@ -344,7 +341,7 @@ static int mcerr_default_debugfs_show(struct seq_file *s, void *v) do_print = 0; /* Only print clients who actually have errors. */ - for (j = 0; j < mc_intr_count; j++) { + for (j = 0; j < INTR_COUNT; j++) { if (mc_clients[i].intr_counts[j]) { do_print = 1; break; @@ -401,10 +398,9 @@ DEFINE_SIMPLE_ATTRIBUTE(mcerr_throttle_debugfs_fops, __get_throttle, * non-essential piece of the kernel no reason to fail the entire MC init * if this fails. */ -int tegra_mcerr_init(struct dentry *mc_parent, struct platform_device *pdev) +int __init tegra_mcerr_init(struct dentry *mc_parent) { - int irq; - const void *prop; + u32 reg; chip_specific.mcerr_info = mcerr_default_info; chip_specific.mcerr_info_update = mcerr_default_info_update; @@ -418,26 +414,15 @@ int tegra_mcerr_init(struct dentry *mc_parent, struct platform_device *pdev) */ mcerr_chip_specific_setup(&chip_specific); - irq = irq_of_parse_and_map(pdev->dev.of_node, 0); - if (irq < 0) { - pr_err("Unable to parse/map MC error interrupt\n"); + if (request_irq(INT_MC_GENERAL, tegra_mc_error_isr, 0, + "mc_status", NULL)) { + pr_err("%s: unable to register MC error interrupt\n", __func__); goto done; + } else { + reg = MC_INT_EN_MASK; + mc_writel(reg, MC_INT_MASK); } - if (request_irq(irq, tegra_mc_error_isr, 0, "mc_status", NULL)) { - pr_err("Unable to register MC error interrupt\n"); - goto done; - } - - prop = of_get_property(pdev->dev.of_node, "int_mask", NULL); - if (!prop) { - pr_err("No int_mask prop for mcerr!\n"); - return -EINVAL; - } - - mc_int_mask = be32_to_cpup(prop); - mc_writel(mc_int_mask, MC_INT_MASK); - mcerr_debugfs_dir = debugfs_create_dir("err", mc_parent); if (mcerr_debugfs_dir == NULL) { pr_err("Failed to make debugfs node: %ld\n", |