diff options
| author | Jay Agarwal <jagarwal@nvidia.com> | 2014-04-03 14:37:59 +0530 |
|---|---|---|
| committer | Jay Agarwal <jagarwal@nvidia.com> | 2014-04-10 22:37:16 -0700 |
| commit | b303e26690990239ac715a83bc7e7b8c609e360b (patch) | |
| tree | 275b7c6dbd98da4d18aefdf128140f6a7713b3a0 /drivers/platform | |
| parent | 7c6faa33b698498a673b5e2599d886a29f2f6ee5 (diff) | |
pcie: tegra: Update T132 PCIE Pads prod settings
Bug 1476459
Change-Id: Id96161878095ed927c7be3c69d1fbae245e36702
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/391780
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Diffstat (limited to 'drivers/platform')
| -rw-r--r-- | drivers/platform/tegra/tegra_usb_pad_ctrl.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/platform/tegra/tegra_usb_pad_ctrl.c b/drivers/platform/tegra/tegra_usb_pad_ctrl.c index 0a4cb71bf22d..0b49d76cf90d 100644 --- a/drivers/platform/tegra/tegra_usb_pad_ctrl.c +++ b/drivers/platform/tegra/tegra_usb_pad_ctrl.c @@ -445,7 +445,13 @@ static int tegra_xusb_padctl_phy_enable(void) XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_EN | XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL); writel(val, pad_base + XUSB_PADCTL_IOPHY_PLL_P0_CTL2_0); - +#ifdef CONFIG_ARCH_TEGRA_13x_SOC + /* recommended prod setting */ + val = readl(pad_base + XUSB_PADCTL_IOPHY_PLL_P0_CTL2_0); + val &= ~XUSB_PADCTL_IOPHY_PLL_P0_CTL2_PLL0_CP_CNTL_MASK; + val |= XUSB_PADCTL_IOPHY_PLL_P0_CTL2_PLL0_CP_CNTL_VAL; + writel(val, pad_base + XUSB_PADCTL_IOPHY_PLL_P0_CTL2_0); +#endif /* take PLL out of reset */ val = readl(pad_base + XUSB_PADCTL_IOPHY_PLL_P0_CTL1_0); val |= XUSB_PADCTL_IOPHY_PLL_P0_CTL1_PLL_RST_; |