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authorWayne Boyer <wayneb@linux.vnet.ibm.com>2010-06-17 11:51:40 -0700
committerJames Bottomley <James.Bottomley@suse.de>2010-07-27 12:03:49 -0500
commitcb237ef7a45f22373575b2d2ad2d06f7d38d6bce (patch)
treea6f541f660fbaf67e4c4876e86fe367c685dfee9 /drivers/scsi/ipr.h
parentcdd3cb156f190edb37d7066ddbf879354da2b634 (diff)
[SCSI] ipr: add MMIO write to perform BIST for 64 bit adapters
The 64 bit chip used in new adapters does not properly support the BIST register in PCI config space. This patch implements an alternative MMIO write reset method. Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/ipr.h')
-rw-r--r--drivers/scsi/ipr.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 0ef9a67112a8..ba63826dd905 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -272,6 +272,7 @@ IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
#define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
#define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
+#define IPR_UPROCI_SIS64_START_BIST (0x80000000 >> 23)
#define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
#define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
@@ -1301,6 +1302,9 @@ struct ipr_chip_t {
u16 sis_type;
#define IPR_SIS32 0x00
#define IPR_SIS64 0x01
+ u16 bist_method;
+#define IPR_PCI_CFG 0x00
+#define IPR_MMIO 0x01
const struct ipr_chip_cfg_t *cfg;
};