diff options
| author | James Smart <James.Smart@Emulex.Com> | 2008-12-04 22:39:19 -0500 |
|---|---|---|
| committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-12-29 11:24:26 -0600 |
| commit | 97207482fcdd120a60a44e9eb6bbad8da6f81c9d (patch) | |
| tree | 505eaae602772597da496232efe787e485dda718 /drivers/scsi/lpfc/lpfc_hw.h | |
| parent | eada272dfc32ba3dcd33e7ca5875337defb13c54 (diff) | |
[SCSI] lpfc 8.3.0 : Added 3 small features and improve PCI EEH support
- Added FC_REG_VPORTRSCN_EVENT to lpfc_nl.h
- Added code to provide option ROM version from HBA and via sysfs
- Added support for HPS bit in config port mailbox command to tell HBA
that host group pointers are in host memory.
- Bugfix for Extended Error Handling (EEH) support on IBM PowerPC P6
platform with MSI enabled
Signed-off-by: James Smart <James.Smart@emulex.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/lpfc/lpfc_hw.h')
| -rw-r--r-- | drivers/scsi/lpfc/lpfc_hw.h | 37 |
1 files changed, 34 insertions, 3 deletions
diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h index 81d1df418e47..4b5c12440b83 100644 --- a/drivers/scsi/lpfc/lpfc_hw.h +++ b/drivers/scsi/lpfc/lpfc_hw.h @@ -2362,6 +2362,30 @@ typedef struct { #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ +#define WAKE_UP_PARMS_REGION_ID 4 +#define WAKE_UP_PARMS_WORD_SIZE 15 + +/* Option rom version structure */ +struct prog_id { +#ifdef __BIG_ENDIAN_BITFIELD + uint8_t type; + uint8_t id; + uint32_t ver:4; /* Major Version */ + uint32_t rev:4; /* Revision */ + uint32_t lev:2; /* Level */ + uint32_t dist:2; /* Dist Type */ + uint32_t num:4; /* number after dist type */ +#else /* __LITTLE_ENDIAN_BITFIELD */ + uint32_t num:4; /* number after dist type */ + uint32_t dist:2; /* Dist Type */ + uint32_t lev:2; /* Level */ + uint32_t rev:4; /* Revision */ + uint32_t ver:4; /* Major Version */ + uint8_t id; + uint8_t type; +#endif +}; + /* Structure for MB Command UPDATE_CFG (0x1B) */ struct update_cfg_var { @@ -2555,10 +2579,17 @@ typedef struct { uint32_t pcbLow; /* bit 31:0 of memory based port config block */ uint32_t pcbHigh; /* bit 63:32 of memory based port config block */ - uint32_t hbainit[6]; + uint32_t hbainit[5]; +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ + uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ +#else /* __LITTLE_ENDIAN */ + uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ + uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ +#endif #ifdef __BIG_ENDIAN_BITFIELD - uint32_t rsvd : 24; /* Reserved */ + uint32_t rsvd1 : 24; /* Reserved */ uint32_t cmv : 1; /* Configure Max VPIs */ uint32_t ccrp : 1; /* Config Command Ring Polling */ uint32_t csah : 1; /* Configure Synchronous Abort Handling */ @@ -2576,7 +2607,7 @@ typedef struct { uint32_t csah : 1; /* Configure Synchronous Abort Handling */ uint32_t ccrp : 1; /* Config Command Ring Polling */ uint32_t cmv : 1; /* Configure Max VPIs */ - uint32_t rsvd : 24; /* Reserved */ + uint32_t rsvd1 : 24; /* Reserved */ #endif #ifdef __BIG_ENDIAN_BITFIELD uint32_t rsvd2 : 24; /* Reserved */ |