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authorAxel Lin <axel.lin@ingics.com>2014-02-13 19:05:38 +0800
committerMark Brown <broonie@linaro.org>2014-02-23 13:14:39 +0900
commitf734394d861fe71eafa28d6c28199d9847c5a319 (patch)
treea9eb43efa726f4d5ceb4e36ada69b9fe0d2a78e2 /drivers/spi/spi-fsl-spi.c
parent4302a59629f7a0bd70fd1605d2b558597517372a (diff)
spi: fsl-spi: Convert to let spi core validate xfer->bits_per_word
Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. fsl_spi_grlib_probe() may update mpc8xxx_spi->max_bits_per_word setting. So set master->bits_per_word_mask after fsl_spi_grlib_probe(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers/spi/spi-fsl-spi.c')
-rw-r--r--drivers/spi/spi-fsl-spi.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
index 4dcb2929c01f..f35488ed62a9 100644
--- a/drivers/spi/spi-fsl-spi.c
+++ b/drivers/spi/spi-fsl-spi.c
@@ -239,12 +239,6 @@ static int fsl_spi_setup_transfer(struct spi_device *spi,
if (!bits_per_word)
bits_per_word = spi->bits_per_word;
- /* Make sure its a bit width we support [4..16, 32] */
- if ((bits_per_word < 4)
- || ((bits_per_word > 16) && (bits_per_word != 32))
- || (bits_per_word > mpc8xxx_spi->max_bits_per_word))
- return -EINVAL;
-
if (!hz)
hz = spi->max_speed_hz;
@@ -651,6 +645,10 @@ static struct spi_master * fsl_spi_probe(struct device *dev,
if (mpc8xxx_spi->type == TYPE_GRLIB)
fsl_spi_grlib_probe(dev);
+ master->bits_per_word_mask =
+ (SPI_BPW_RANGE_MASK(4, 16) | SPI_BPW_MASK(32)) &
+ SPI_BPW_RANGE_MASK(1, mpc8xxx_spi->max_bits_per_word);
+
if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)
mpc8xxx_spi->set_shifts = fsl_spi_qe_cpu_set_shifts;