diff options
| author | Kunal Agrawal <kunala@nvidia.com> | 2012-09-25 20:52:49 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-10-11 14:41:49 -0700 |
| commit | 07b72196d3ef5140269d5afc889e33c5f8357b44 (patch) | |
| tree | dc9a8a6a58e643cf6d4abec8aba138dc4778bf0e /drivers/spi | |
| parent | 020b99ceac3630851047d8f0d49840dda116ca9b (diff) | |
spi: tegra: fix dma based transfer issue
Tegra11 spi controller not require the Tx fifo
to be fill before enabling dma. Removing this checks.
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/135160
(cherry picked from commit c9f0787bd10a9dc17eeb6587a67493e0d042160a)
Change-Id: I366c191b9db6d713389307a1bc9904b2d8b0b064
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143266
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-tegra11.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/spi/spi-tegra11.c b/drivers/spi/spi-tegra11.c index 2fd8eb8dfea4..119a5e5fec23 100644 --- a/drivers/spi/spi-tegra11.c +++ b/drivers/spi/spi-tegra11.c @@ -545,7 +545,7 @@ static int spi_tegra_start_dma_based_transfer( /* Make sure that Rx and Tx fifo are empty */ test_val = spi_tegra_readl(tspi, SPI_FIFO_STATUS); - if (((test_val >> 16) & 0x3FFF) != 0x7F) + if (((test_val >> 16) & 0x3FFF) != 0x40) dev_err(&tspi->pdev->dev, "The Rx and Tx fifo are not empty status 0x%08lx\n", test_val); @@ -586,11 +586,6 @@ static int spi_tegra_start_dma_based_transfer( "Error in starting tx dma error = %d\n", ret); return ret; } - - /* Wait for tx fifo to be fill before starting SPI */ - test_val = spi_tegra_readl(tspi, SPI_FIFO_STATUS); - while (!(test_val & SPI_TX_FIFO_FULL)) - test_val = spi_tegra_readl(tspi, SPI_FIFO_STATUS); } if (tspi->cur_direction & DATA_DIR_RX) { @@ -639,6 +634,7 @@ static int spi_tegra_start_cpu_based_transfer( spi_tegra_writel(tspi, val, SPI_DMA_CTL); tspi->dma_control_reg = val; + tspi->is_curr_dma_xfer = false; val = tspi->command1_reg; val |= SPI_PIO; spi_tegra_writel(tspi, val, SPI_COMMAND1); |