summaryrefslogtreecommitdiff
path: root/drivers/ssb/main.c
diff options
context:
space:
mode:
authorMichael Büsch <mb@bu3sch.de>2011-02-15 00:21:50 +0100
committerJohn W. Linville <linville@tuxdriver.com>2011-02-18 16:53:20 -0500
commit8c68bd401d423c81fd4bfc19c625180528e4a5e8 (patch)
treedc96f89a1a11972ac7fe716a8ec154fe22407b5a /drivers/ssb/main.c
parentf4f314bf6fd39d85065c3fcda27bd594163abcf0 (diff)
ssb: Make ssb_wait_bit multi-bit safe
ssb_wait_bit was designed for only one-bit bitmasks. People start using it for multi-bit bitmasks. Make the "set" case is safe for this. The "unset" case is already safe. This does not change behavior of the current code. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/main.c')
-rw-r--r--drivers/ssb/main.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 3918d2cc5856..775c579817b4 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1192,10 +1192,10 @@ void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
}
EXPORT_SYMBOL(ssb_device_enable);
-/* Wait for a bit in a register to get set or unset.
+/* Wait for bitmask in a register to get set or cleared.
* timeout is in units of ten-microseconds */
-static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
- int timeout, int set)
+static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
+ int timeout, int set)
{
int i;
u32 val;
@@ -1203,7 +1203,7 @@ static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
for (i = 0; i < timeout; i++) {
val = ssb_read32(dev, reg);
if (set) {
- if (val & bitmask)
+ if ((val & bitmask) == bitmask)
return 0;
} else {
if (!(val & bitmask))
@@ -1227,8 +1227,8 @@ void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
reject = ssb_tmslow_reject_bitmask(dev);
ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
- ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
- ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
+ ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
+ ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
ssb_write32(dev, SSB_TMSLOW,
SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
reject | SSB_TMSLOW_RESET |