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authorSergey Organov <sorganov@gmail.com>2019-08-28 21:37:54 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-09-04 12:43:55 +0200
commitd47bcb4a6cf0be5f3b390fe3fc12416034f86ae2 (patch)
tree018f7985745a9c00b5148a828bde0f4c3ed0c513 /drivers/tty/serial/imx.c
parent85f30fbf32d1e8a55c5c563aaf8a35488c6d9745 (diff)
serial: imx: fix data breakage on termios change
imx_set_termios(): avoid writing baud rate divider registers when the values to be written are the same as current. Any writing seems to restart transmission/receiving logic in the hardware, that leads to data breakage even when rate doesn't in fact change. E.g., user switches RTS/CTS handshake and suddenly gets broken bytes. Signed-off-by: Sergey Organov <sorganov@gmail.com> Link: https://lore.kernel.org/r/1567017475-11919-5-git-send-email-sorganov@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/imx.c')
-rw-r--r--drivers/tty/serial/imx.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index cc3783c0a7ed..e89045a085fb 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1545,7 +1545,7 @@ imx_uart_set_termios(struct uart_port *port, struct ktermios *termios,
unsigned int baud, quot;
unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
unsigned long div;
- unsigned long num, denom;
+ unsigned long num, denom, old_ubir, old_ubmr;
uint64_t tdiv64;
/*
@@ -1670,8 +1670,21 @@ imx_uart_set_termios(struct uart_port *port, struct ktermios *termios,
ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div);
imx_uart_writel(sport, ufcr, UFCR);
- imx_uart_writel(sport, num, UBIR);
- imx_uart_writel(sport, denom, UBMR);
+ /*
+ * Two registers below should always be written both and in this
+ * particular order. One consequence is that we need to check if any of
+ * them changes and then update both. We do need the check for change
+ * as even writing the same values seem to "restart"
+ * transmission/receiving logic in the hardware, that leads to data
+ * breakage even when rate doesn't in fact change. E.g., user switches
+ * RTS/CTS handshake and suddenly gets broken bytes.
+ */
+ old_ubir = imx_uart_readl(sport, UBIR);
+ old_ubmr = imx_uart_readl(sport, UBMR);
+ if (old_ubir != num || old_ubmr != denom) {
+ imx_uart_writel(sport, num, UBIR);
+ imx_uart_writel(sport, denom, UBMR);
+ }
if (!imx_uart_is_imx1(sport))
imx_uart_writel(sport, sport->port.uartclk / div / 1000,