diff options
| author | Li Jun <b47624@freescale.com> | 2014-06-20 15:52:14 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:36 +0800 |
| commit | 9662ebf1d963e22315414f7cf1992c59238dbd95 (patch) | |
| tree | c5478b74f461474818b21dbda33ba122f88dd6ef /drivers/usb/chipidea/core.c | |
| parent | 238f5daf05c9b80ef4f63c07160eca765f565a5f (diff) | |
MLK-11340-41 usb: chipidea: add vbus glitch handling
We add vbus glitch handling for both BSV rise and drop interruptes.
This patch changes covers usb otg certification case, so the possible
cases of vbus rise:
- USB vbus can reach AVV(4.4v), valid vbus.
- USB vbus keeps above BSV(0.8v) but lower than AVV(4.4v) for
more than 300ms, we think it's valid vbus event, this can meet
usb otg certificataion case(B device can do connection in 1s when
vbus is 4.0v).
- USB vbus cannot be kept above BSV(0.8v) for more than 300ms,
it's a vbus glitch.
In case of vbus drop: if the vbus on flag is not set, it's a vbus glitch,
otherwise it's a valid vbus drop event.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
During 4.14 rebase this was squashed from 2 commits:
commit c133d378ab68 ("MLK-11340-41 usb: chipidea: add vbus glitch handling")
commit 2d0f6361ceef ("MLK-11340-42 usb: chipidea: usb vbus glitch check logic change")
The first patch used a hw_wait_reg that was deleted from upstream long
ago and the second patch removed it. Generate a single commit instead.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Diffstat (limited to 'drivers/usb/chipidea/core.c')
| -rw-r--r-- | drivers/usb/chipidea/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 8e335191ae94..ecb0edb87718 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -574,7 +574,7 @@ static irqreturn_t ci_irq(int irq, void *data) * and disconnection events. */ if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) { - ci->b_sess_valid_event = true; + ci->vbus_glitch_check_event = true; /* Clear BSV irq */ hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); ci_otg_queue_work(ci); |