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authorAndiry Xu <andiry.xu@amd.com>2011-09-23 14:19:49 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-09-26 15:51:09 -0700
commitd2f52c9e585bbb1a3c164e02b8dcd0d996c67353 (patch)
treedbf01ea79e8d869e3ab3493cea8e2b1801d193bc /drivers/usb/host/xhci-hub.c
parentc9682dffceb4bb3bdf6df4c0c87c4b887b03f5b7 (diff)
xHCI: test and clear RWC bit
Introduce xhci_test_and_clear_bit() to clear RWC bit in PORTSC register. Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci-hub.c')
-rw-r--r--drivers/usb/host/xhci-hub.c22
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index ef03c18a0128..d7be6d7324d3 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -404,6 +404,20 @@ void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
xhci_writel(xhci, temp, port_array[port_id]);
}
+/* Test and clear port RWC bit */
+void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
+ int port_id, u32 port_bit)
+{
+ u32 temp;
+
+ temp = xhci_readl(xhci, port_array[port_id]);
+ if (temp & port_bit) {
+ temp = xhci_port_state_to_neutral(temp);
+ temp |= port_bit;
+ xhci_writel(xhci, temp, port_array[port_id]);
+ }
+}
+
int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
u16 wIndex, char *buf, u16 wLength)
{
@@ -924,12 +938,8 @@ int xhci_bus_resume(struct usb_hcd *hcd)
spin_lock_irqsave(&xhci->lock, flags);
/* Clear PLC */
- temp = xhci_readl(xhci, port_array[port_index]);
- if (temp & PORT_PLC) {
- temp = xhci_port_state_to_neutral(temp);
- temp |= PORT_PLC;
- xhci_writel(xhci, temp, port_array[port_index]);
- }
+ xhci_test_and_clear_bit(xhci, port_array, port_index,
+ PORT_PLC);
slot_id = xhci_find_slot_id_by_port(hcd,
xhci, port_index + 1);