diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-04-10 15:12:27 +0900 |
|---|---|---|
| committer | Riham Haidar <rhaidar@nvidia.com> | 2014-05-02 16:40:02 -0700 |
| commit | 09d2218257b4b770e4e60e209279d75788546bf2 (patch) | |
| tree | 39ba2ffb235ba38c299ed784d868e3b25e5abc29 /drivers/video/tegra/dc/dc.c | |
| parent | a54e33fa5d8980b2334b2f21a4541278c518b5c2 (diff) | |
video: tegra: dc: remove tegra_dc_get_cmu
tegra_dc_get_cmu is unused, broken, and relies on debug registers that
we don't want to use in production code, so remove it.
Change-Id: Iac22e3a505a7cba1197c81433bb7544c5ce67e63
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/394545
(cherry picked from commit 8fee95e1aec265ae8bdf091213649a3d4bada686)
Reviewed-on: http://git-master/r/403385
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc/dc.c')
| -rw-r--r-- | drivers/video/tegra/dc/dc.c | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 0a8c6bfa695d..d56db146f804 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -1115,49 +1115,6 @@ static void tegra_dc_set_cmu(struct tegra_dc *dc, struct tegra_dc_cmu *cmu) } } -void tegra_dc_get_cmu(struct tegra_dc *dc, struct tegra_dc_cmu *cmu) -{ - u32 val; - u32 i; - bool flags; - - val = tegra_dc_readl(dc, DC_DISP_DISP_COLOR_CONTROL); - if (val & CMU_ENABLE) - flags = true; - - val &= ~CMU_ENABLE; - tegra_dc_writel(dc, val, DC_DISP_DISP_COLOR_CONTROL); - tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); - - /*TODO: Sync up with frame end */ - mdelay(20); - - for (i = 0; i < 256; i++) { - val = LUT1_READ_EN | LUT1_READ_ADDR(i); - tegra_dc_writel(dc, val, DC_COM_CMU_LUT1_READ); - val = tegra_dc_readl(dc, DC_COM_CMU_LUT1); - cmu->lut1[i] = LUT1_READ_DATA(val); - } - - cmu->csc.krr = tegra_dc_readl(dc, DC_COM_CMU_CSC_KRR); - cmu->csc.kgr = tegra_dc_readl(dc, DC_COM_CMU_CSC_KGR); - cmu->csc.kbr = tegra_dc_readl(dc, DC_COM_CMU_CSC_KBR); - cmu->csc.krg = tegra_dc_readl(dc, DC_COM_CMU_CSC_KRG); - cmu->csc.kgg = tegra_dc_readl(dc, DC_COM_CMU_CSC_KGG); - cmu->csc.kbg = tegra_dc_readl(dc, DC_COM_CMU_CSC_KBG); - cmu->csc.krb = tegra_dc_readl(dc, DC_COM_CMU_CSC_KRB); - cmu->csc.kgb = tegra_dc_readl(dc, DC_COM_CMU_CSC_KGB); - cmu->csc.kbb = tegra_dc_readl(dc, DC_COM_CMU_CSC_KBB); - - for (i = 0; i < 960; i++) { - val = LUT2_READ_EN | LUT2_READ_ADDR(i); - tegra_dc_writel(dc, val, DC_COM_CMU_LUT2_READ); - val = tegra_dc_readl(dc, DC_COM_CMU_LUT2); - cmu->lut2[i] = LUT2_READ_DATA(val); - } -} -EXPORT_SYMBOL(tegra_dc_get_cmu); - int _tegra_dc_update_cmu(struct tegra_dc *dc, struct tegra_dc_cmu *cmu) { u32 val; |