diff options
| author | Luke Huang <lhuang@nvidia.com> | 2011-01-27 13:14:44 -0800 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-03-16 09:49:10 -0800 |
| commit | 1c3b9bd9adf9343a0612ba0bfcd6c7cfef77a999 (patch) | |
| tree | 72339757afdd1809f25bf2e7cd10f79e492b901b /drivers/video/tegra/dc/dc_reg.h | |
| parent | 53a0bb517d6e14d8cee3a9ee71405da56e8ce8c9 (diff) | |
video: tegra: dsi: Added dsi support.
Bug 793366
Bug 794499
Change-Id: Id49d86dd7760b75ef4947f5bdab9e37f0333391d
Reviewed-on: http://git-master/r/#change,18950
Reviewed-on: http://git-master/r/22508
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc/dc_reg.h')
| -rw-r--r-- | drivers/video/tegra/dc/dc_reg.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc_reg.h b/drivers/video/tegra/dc/dc_reg.h index 65a9217c15a3..29f98c1c4da7 100644 --- a/drivers/video/tegra/dc/dc_reg.h +++ b/drivers/video/tegra/dc/dc_reg.h @@ -32,6 +32,14 @@ #define DC_CMD_WIN_C_INCR_SYNCPT_ERROR 0x01a #define DC_CMD_CONT_SYNCPT_VSYNC 0x028 #define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031 +#define MSF_POLARITY_HIGH (0 << 0) +#define MSF_POLARITY_LOW (1 << 0) +#define MSF_DISABLE (0 << 1) +#define MSF_ENABLE (1 << 1) +#define MSF_LSPI (0 << 2) +#define MSF_LDC (1 << 2) +#define MSF_LSDI (2 << 2) + #define DC_CMD_DISPLAY_COMMAND 0x032 #define DISP_COMMAND_RAISE (1 << 0) #define DISP_CTRL_MODE_STOP (0 << 5) @@ -93,6 +101,7 @@ #define WIN_A_UPDATE (1 << 9) #define WIN_B_UPDATE (1 << 10) #define WIN_C_UPDATE (1 << 11) +#define NC_HOST_TRIG (1 << 24) #define DC_CMD_DISPLAY_WINDOW_HEADER 0x042 #define WINDOW_A_SELECT (1 << 4) @@ -107,6 +116,8 @@ #define DC_COM_PIN_OUTPUT_ENABLE1 0x303 #define DC_COM_PIN_OUTPUT_ENABLE2 0x304 #define DC_COM_PIN_OUTPUT_ENABLE3 0x305 +#define PIN_OUTPUT_LSPI_OUTPUT_EN (1 << 8) +#define PIN_OUTPUT_LSPI_OUTPUT_DIS (1 << 8) #define DC_COM_PIN_OUTPUT_POLARITY0 0x306 #define DC_COM_PIN_OUTPUT_POLARITY1 0x307 @@ -127,6 +138,8 @@ #define DC_COM_PIN_INPUT_ENABLE1 0x30f #define DC_COM_PIN_INPUT_ENABLE2 0x310 #define DC_COM_PIN_INPUT_ENABLE3 0x311 +#define PIN_INPUT_LSPI_INPUT_EN (1 << 8) +#define PIN_INPUT_LSPI_INPUT_DIS (1 << 8) #define DC_COM_PIN_INPUT_DATA0 0x312 #define DC_COM_PIN_INPUT_DATA1 0x313 #define DC_COM_PIN_OUTPUT_SELECT0 0x314 |